boards/arm/nrf51_blenano/nrf51_blenano-pinctrl.dtsi

/*
 * Copyright (c) 2022 Nordic Semiconductor
 * SPDX-License-Identifier: Apache-2.0
 */

&pinctrl {
	uart0_default: uart0_default {
		group1 {
			psels = <NRF_PSEL(UART_TX, 0, 9)>,
				<NRF_PSEL(UART_RX, 0, 11)>,
				<NRF_PSEL(UART_RTS, 0, 8)>,
				<NRF_PSEL(UART_CTS, 0, 10)>;
		};
	};

	uart0_sleep: uart0_sleep {
		group1 {
			psels = <NRF_PSEL(UART_TX, 0, 9)>,
				<NRF_PSEL(UART_RX, 0, 11)>,
				<NRF_PSEL(UART_RTS, 0, 8)>,
				<NRF_PSEL(UART_CTS, 0, 10)>;
			low-power-enable;
		};
	};

};