blob: d79383d71003d2e92ec8c408b4a64d6c4ae2b9ce [file] [log] [blame]
/*
* Copyright (c) 2022 metraTec
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <arm/armv8-m.dtsi>
#include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <mem.h>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-m33f";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
mpu: mpu@e000ed90 {
compatible = "arm,armv8m-mpu";
reg = <0xe000ed90 0x40>;
arm,num-mpu-regions = <8>;
};
};
};
};
&sram {
#address-cells = <1>;
#size-cells = <1>;
/* lpc55_0x Memory configurations:
*
* LPC5502: RAMX: 16K, SRAM0: 32K
* LPC55x04: RAMX: 16K, SRAM0: 32K, SRAM1: 16K
* LPC55x06: RAMX: 16K, SRAM0: 32K, SRAM1: 16K, SRAM2: 16K, SRAM3: 16k
*/
sramx: memory@4000000 {
compatible = "mmio-sram";
reg = <0x04000000 DT_SIZE_K(16)>;
};
sram0: memory@20000000 {
compatible = "mmio-sram";
reg = <0x20000000 DT_SIZE_K(32)>;
};
sram1: memory@20008000 {
compatible = "mmio-sram";
reg = <0x20008000 DT_SIZE_K(16)>;
};
sram2: memory@2000C000 {
compatible = "mmio-sram";
reg = <0x2000C000 DT_SIZE_K(16)>;
};
sram3: memory@20010000 {
compatible = "mmio-sram";
reg = <0x20010000 DT_SIZE_K(16)>;
};
};
&peripheral {
#address-cells = <1>;
#size-cells = <1>;
syscon: syscon@0 {
compatible = "nxp,lpc-syscon";
reg = <0x0 0x4000>;
#clock-cells = <1>;
};
iap: flash-controller@34000 {
compatible = "nxp,iap-fmc55";
reg = <0x34000 0x18>;
status = "disabled";
#address-cells = <1>;
#size-cells = <1>;
flash0: flash@0 {
compatible = "soc-nv-flash";
reg = <0x0 DT_SIZE_K(246)>;
erase-block-size = <512>;
write-block-size = <512>;
};
flash_reserved: flash@3d800 {
compatible = "soc-nv-flash";
reg = <0x0003d800 DT_SIZE_K(10)>;
status = "disabled";
};
uuid: flash@9fc70 {
compatible = "nxp,lpc-uid";
reg = <0x3fc70 0x10>;
};
boot_rom: flash@3000000 {
compatible = "soc-nv-flash";
reg = <0x3000000 DT_SIZE_K(128)>;
};
};
iocon: iocon@1000 {
compatible = "nxp,lpc-iocon";
reg = <0x1000 0x100>;
#address-cells = <1>;
#size-cells = <1>;
ranges = <0x0 0x1000 0x100>;
pinctrl: pinctrl {
compatible = "nxp,lpc-iocon-pinctrl";
};
};
gpio0: gpio@0 {
compatible = "nxp,lpc-gpio";
reg = <0x8c000 0x2488>;
int-source = "pint";
gpio-controller;
#gpio-cells = <2>;
port = <0>;
};
gpio1: gpio@1 {
compatible = "nxp,lpc-gpio";
reg = <0x8c000 0x2488>;
int-source = "pint";
gpio-controller;
#gpio-cells = <2>;
port = <1>;
};
pint: pint@4000 {
compatible = "nxp,pint";
reg = <0x4000 0x1000>;
interrupt-controller;
#interrupt-cells = <1>;
#address-cells = <0>;
interrupts = <4 2>, <5 2>, <6 2>, <7 2>,
<32 2>, <33 2>, <34 2>, <35 2>;
num-lines = <8>;
num-inputs = <64>;
};
flexcomm0: flexcomm@86000 {
compatible = "nxp,lpc-flexcomm";
reg = <0x86000 0x1000>;
interrupts = <14 0>;
clocks = <&syscon MCUX_FLEXCOMM0_CLK>;
status = "disabled";
};
flexcomm1: flexcomm@87000 {
compatible = "nxp,lpc-flexcomm";
reg = <0x87000 0x1000>;
interrupts = <15 0>;
clocks = <&syscon MCUX_FLEXCOMM1_CLK>;
status = "disabled";
};
flexcomm2: flexcomm@88000 {
compatible = "nxp,lpc-flexcomm";
reg = <0x88000 0x1000>;
interrupts = <16 0>;
clocks = <&syscon MCUX_FLEXCOMM2_CLK>;
status = "disabled";
};
flexcomm3: flexcomm@89000 {
compatible = "nxp,lpc-flexcomm";
reg = <0x89000 0x1000>;
interrupts = <17 0>;
clocks = <&syscon MCUX_FLEXCOMM3_CLK>;
status = "disabled";
};
flexcomm4: flexcomm@8a000 {
compatible = "nxp,lpc-flexcomm";
reg = <0x8a000 0x1000>;
interrupts = <18 0>;
clocks = <&syscon MCUX_FLEXCOMM4_CLK>;
status = "disabled";
};
flexcomm5: flexcomm@96000 {
compatible = "nxp,lpc-flexcomm";
reg = <0x96000 0x1000>;
interrupts = <19 0>;
clocks = <&syscon MCUX_FLEXCOMM5_CLK>;
status = "disabled";
};
flexcomm6: flexcomm@97000 {
compatible = "nxp,lpc-flexcomm";
reg = <0x97000 0x1000>;
interrupts = <20 0>;
clocks = <&syscon MCUX_FLEXCOMM6_CLK>;
status = "disabled";
};
flexcomm7: flexcomm@98000 {
compatible = "nxp,lpc-flexcomm";
reg = <0x98000 0x1000>;
interrupts = <21 0>;
clocks = <&syscon MCUX_FLEXCOMM7_CLK>;
status = "disabled";
};
hs_lspi: spi@9f000 {
compatible = "nxp,lpc-spi";
reg = <0x9f000 0x1000>;
interrupts = <59 0>;
clocks = <&syscon MCUX_HS_SPI_CLK>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
};
can0: can@9d000 {
compatible = "nxp,lpc-mcan";
reg = <0x9d000 0x1000>;
interrupts = <43 0>, <44 0>;
clocks = <&syscon MCUX_MCAN_CLK>;
std-filter-elements = <15>;
ext-filter-elements = <15>;
rx-fifo0-elements = <8>;
rx-fifo1-elements = <8>;
rx-buffer-elements = <8>;
tx-buffer-elements = <15>;
sjw = <1>;
sample-point = <875>;
sjw-data = <1>;
sample-point-data = <875>;
status = "disabled";
};
rng: rng@3a000 {
compatible = "nxp,lpc-rng";
reg = <0x3a000 0x1000>;
status = "okay";
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};