| /* |
| * Copyright (c) 2017 BayLibre, SAS |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <st/f0/stm32f070.dtsi> |
| |
| / { |
| soc { |
| clocks { |
| clk_hsi48: clk-hsi48 { |
| #clock-cells = <0>; |
| compatible = "fixed-clock"; |
| clock-frequency = <DT_FREQ_M(48)>; |
| status = "disabled"; |
| }; |
| }; |
| |
| pinctrl: pin-controller@48000000 { |
| |
| gpioe: gpio@48001000 { |
| compatible = "st,stm32-gpio"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| reg = <0x48001000 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00200000>; |
| }; |
| }; |
| |
| timers2: timers@40000000 { |
| compatible = "st,stm32-timers"; |
| reg = <0x40000000 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000001>; |
| resets = <&rctl STM32_RESET(APB1, 0U)>; |
| interrupts = <15 0>; |
| interrupt-names = "global"; |
| st,prescaler = <0>; |
| status = "disabled"; |
| |
| pwm { |
| compatible = "st,stm32-pwm"; |
| status = "disabled"; |
| #pwm-cells = <3>; |
| }; |
| }; |
| |
| can1: can@40006400 { |
| compatible = "st,stm32-can"; |
| reg = <0x40006400 0x400>; |
| interrupts = <30 0>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB1 0x02000000>; |
| status = "disabled"; |
| sjw = <1>; |
| sample-point = <875>; |
| }; |
| |
| dac1: dac@40007400 { |
| compatible = "st,stm32-dac"; |
| reg = <0x40007400 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB1 0x20000000>; |
| status = "disabled"; |
| #io-channel-cells = <1>; |
| }; |
| |
| dma1: dma@40020000 { |
| interrupts = <9 0 10 0 10 0 11 0 11 0 11 0 11 0>; |
| }; |
| |
| rtc@40002800 { |
| bbram: backup_regs { |
| compatible = "st,stm32-bbram"; |
| st,backup-regs = <5>; |
| status = "disabled"; |
| }; |
| }; |
| }; |
| }; |
