| # Kconfig - SPI driver configuration options |
| |
| # |
| # Copyright (c) 2015 Intel Corporation |
| # |
| # Redistribution and use in source and binary forms, with or without |
| # modification, are permitted provided that the following conditions are met: |
| # |
| # 1) Redistributions of source code must retain the above copyright notice, |
| # this list of conditions and the following disclaimer. |
| # |
| # 2) Redistributions in binary form must reproduce the above copyright notice, |
| # this list of conditions and the following disclaimer in the documentation |
| # and/or other materials provided with the distribution. |
| # |
| # 3) Neither the name of Intel Corporation nor the names of its contributors |
| # may be used to endorse or promote products derived from this software without |
| # specific prior written permission. |
| # |
| # THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| # AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| # IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| # ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| # LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| # CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| # SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| # INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| # CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| # ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| # POSSIBILITY OF SUCH DAMAGE. |
| # |
| |
| # |
| # SPI Drivers |
| # |
| menuconfig SPI |
| bool |
| prompt "SPI hardware bus support" |
| default n |
| help |
| Enable support for the SPI hardware bus. |
| |
| if SPI |
| config SPI_DEBUG |
| bool |
| prompt "SPI drivers debug output" |
| depends on SPI |
| default n |
| help |
| Enable debug output for SPI drivers |
| |
| config SPI_INTEL |
| bool |
| prompt "Intel SPI controller driver" |
| depends on SPI && CPU_MINUTEIA |
| default n |
| help |
| Enable support for Intel's SPI controllers. Such controller |
| was formelly found on XScale chips. It can be found nowadays |
| on CEXXXX Intel media controller and Quark CPU (2 of them). |
| |
| choice |
| depends on SPI_INTEL |
| prompt "Intel SPI interrupt trigger condition" |
| default SPI_INTEL_RISING_EDGE |
| |
| config SPI_INTEL_FALLING_EDGE |
| bool "Falling edge" |
| help |
| "Intel SPI uses falling edge interrupt" |
| |
| config SPI_INTEL_RISING_EDGE |
| bool "Rising edge" |
| help |
| "Intel SPI uses rising edge interrupt" |
| |
| config SPI_INTEL_LEVEL_HIGH |
| bool "Level high" |
| help |
| "Intel SPI uses level high interrupt" |
| |
| config SPI_INTEL_LEVEL_LOW |
| bool "Level low" |
| help |
| "Intel SPI uses level low interrupt" |
| |
| endchoice |
| |
| config SPI_INTEL_VENDOR_ID |
| hex "PCI Vendor ID" |
| depends on SPI_INTEL && PCI |
| default 0x8086 |
| |
| config SPI_INTEL_DEVICE_ID |
| hex "PCI Device ID" |
| depends on SPI_INTEL && PCI |
| default 0x935 |
| |
| config SPI_INTEL_CLASS |
| hex "PCI class" |
| depends on SPI_INTEL && PCI |
| default 0x0C |
| |
| config SPI_INTEL_CS_GPIO |
| bool "SPI port CS pin is controlled via a GPIO port" |
| depends on SPI_INTEL && GPIO |
| default n |
| |
| config SPI_INTEL_PORT_0 |
| bool |
| prompt "Intel SPI port 0" |
| depends on SPI_INTEL |
| default n |
| help |
| Enable Intel's SPI controller port 0. |
| |
| config SPI_INTEL_PORT_0_DRV_NAME |
| string |
| prompt "Intel SPI port 0 device name" |
| depends on SPI_INTEL_PORT_0 |
| default "intel_spi_0" |
| |
| config SPI_INTEL_PORT_0_BUS |
| int "Port 0 PCI Bus" |
| depends on SPI_INTEL_PORT_0 && PCI |
| default 0 |
| |
| config SPI_INTEL_PORT_0_DEV |
| int "Port 0 PCI Dev" |
| depends on SPI_INTEL_PORT_0 && PCI |
| default 0 |
| |
| config SPI_INTEL_PORT_0_FUNCTION |
| int "Port 0 PCI function" |
| depends on SPI_INTEL_PORT_0 && PCI |
| default 0 |
| |
| config SPI_INTEL_PORT_0_REGS |
| hex |
| prompt "Port 0 registers address" |
| depends on SPI_INTEL_PORT_0 |
| default 0x00000000 |
| |
| config SPI_INTEL_PORT_0_IRQ |
| int |
| prompt "Port 0 interrupt" |
| depends on SPI_INTEL_PORT_0 |
| default 0 |
| |
| config SPI_INTEL_PORT_0_PRI |
| int |
| prompt "Port 0 interrupt priority" |
| depends on SPI_INTEL_PORT_0 |
| default 0 |
| |
| config SPI_INTEL_PORT_0_CS_GPIO_PORT |
| string |
| prompt "The GPIO port which is used to control CS" |
| depends on SPI_INTEL_CS_GPIO |
| default GPIO_DW_0_NAME |
| |
| config SPI_INTEL_PORT_0_CS_GPIO_PIN |
| int "The GPIO PIN which is used to act as a CS pin" |
| depends on SPI_INTEL_CS_GPIO |
| default 0 |
| |
| config SPI_INTEL_PORT_1 |
| bool |
| prompt "Intel SPI port 1" |
| depends on SPI_INTEL |
| default n |
| help |
| Enable Intel's SPI controller port 1. |
| |
| config SPI_INTEL_PORT_1_DRV_NAME |
| string |
| prompt "Intel SPI port 1 device name" |
| depends on SPI_INTEL_PORT_1 |
| default "intel_spi_1" |
| |
| config SPI_INTEL_PORT_1_BUS |
| int "Port 1 PCI Bus" |
| depends on SPI_INTEL_PORT_1 && PCI |
| default 0 |
| |
| config SPI_INTEL_PORT_1_DEV |
| int "Port 1 PCI Dev" |
| depends on SPI_INTEL_PORT_1 && PCI |
| default 0 |
| |
| config SPI_INTEL_PORT_1_FUNCTION |
| int "Port 1 PCI function" |
| depends on SPI_INTEL_PORT_1 && PCI |
| default 0 |
| |
| config SPI_INTEL_PORT_1_REGS |
| hex |
| prompt "Port 1 registers address" |
| depends on SPI_INTEL_PORT_1 |
| default 0x00000000 |
| |
| config SPI_INTEL_PORT_1_IRQ |
| int |
| prompt "Port 1 interrupt" |
| depends on SPI_INTEL_PORT_1 |
| default 0 |
| |
| config SPI_INTEL_PORT_1_PRI |
| int |
| prompt "Port 0 interrupt priority" |
| depends on SPI_INTEL_PORT_1 |
| default 0 |
| endif # SPI |