| commit | 5a11caba336c57445585911b52a231de9fdfc6cb | [log] [tgz] |
|---|---|---|
| author | Daniel Leung <daniel.leung@intel.com> | Wed Feb 03 14:30:27 2021 -0800 |
| committer | Anas Nashif <anas.nashif@intel.com> | Fri Feb 05 07:45:07 2021 -0500 |
| tree | 58e78040fbcefaa436f124e5456f40732d0e3bdb | |
| parent | 0ee896117cb55c5d83ba069f30cf97c22e9d4ce3 [diff] |
xtensa: fix rsr/wsr assembly for XCC XCC doesn't like the "rsr.<reg name>" style assembly so fix that to the other style. Also, XCC doesn't like _CONCAT() with the EPC/EPS registers so need to spell out all of them. Signed-off-by: Daniel Leung <daniel.leung@intel.com>