blob: 68e56dc7015a75cedff09974fcf92dc2c8965799 [file] [log] [blame]
/*
* Copyright (c) 2021 Nuvoton Technology Corporation.
*
* SPDX-License-Identifier: Apache-2.0
*/
/dts-v1/;
#include <nuvoton/npcx9m6f.dtsi>
/ {
model = "Nuvoton NPCX9M6F evaluation board";
chosen {
zephyr,sram = &sram0;
zephyr,console = &uart1;
zephyr,flash = &flash0;
};
aliases {
/* For samples/basic/blinky_pwm */
pwm-led0 = &pwm_led0_green;
/* For gpio test suites */
led0 = &gpio_led_red;
/* For pwm test suites */
pwm-0 = &pwm6;
/* For i2c test suites */
i2c-0 = &i2c0_0;
/* For watchdog sample */
watchdog0 = &twd0;
};
leds-pwm {
compatible = "pwm-leds";
pwm_led0_green: pwm_led_0 {
pwms = <&pwm6 0 PWM_POLARITY_INVERTED>;
label = "User D7 green";
};
};
leds-gpio {
compatible = "gpio-leds";
gpio_led_red: led_0 {
gpios = <&gpio6 0 GPIO_ACTIVE_LOW>;
label = "User D8 red";
};
};
power-states {
suspend_to_idle0: suspend-to-idle0 {
compatible = "zephyr,power-state";
power-state-name = "suspend-to-idle";
substate-id = <0>;
min-residency-us = <1000>;
};
suspend_to_idle1: suspend-to-idle1 {
compatible = "zephyr,power-state";
power-state-name = "suspend-to-idle";
substate-id = <1>;
min-residency-us = <201000>;
};
};
vsby-psl-in-list {
psl-in-pads = <&psl_in1>; /* Use PSL_IN1 as detection pins */
status = "okay";
};
};
&cpu0 {
cpu-power-states = <&suspend_to_idle0 &suspend_to_idle1>;
};
&psl_in1 {
/* A falling edge detection type for PSL_IN1 */
flag = <NPCX_PSL_FALLING_EDGE>;
};
/* Overwrite default device properties with overlays in board dt file here. */
&uart1 {
status = "okay";
current-speed = <115200>;
/* Use UART1_SL2 ie. PIN64.65 */
pinctrl-0 = <&altj_cr_sin1_sl2 &altj_cr_sout1_sl2>;
};
&pwm6 {
drive-open-drain;
status = "okay";
};
&adc0 {
/* ADC pinmux is changed only if related channel is configured. */
status = "okay";
};
&espi0 {
status = "okay";
};
&i2c0_0 {
status = "okay";
clock-frequency = <I2C_BITRATE_FAST>;
};
&i2c_ctrl0 {
status = "okay";
};
&tach1 {
status = "okay";
pinctrl-0 = <&alt3_ta1_sl1>; /* Use TA1_SL1 (PIN40) as input pin */
port = <NPCX_TACH_PORT_A>; /* port-A is selected */
sample-clk = <NPCX_TACH_FREQ_LFCLK>; /* Use LFCLK as sampling clock */
pulses-per-round = <1>; /* number of pulses per round of encoder */
};