blob: 589f603a9afe1fd3e643c7556cd1bc2ecc4e7357 [file] [log] [blame]
/*
* Copyright (c) 2020, Linaro Ltd.
*
* SPDX-License-Identifier: Apache-2.0
*
* Application overlay for testing driver builds
*
* Names in this file should be chosen in a way that won't conflict
* with real-world devicetree nodes, to allow these tests to run on
* (and be extended to test) real hardware.
*/
/ {
test {
#address-cells = <1>;
#size-cells = <1>;
test_gpio: gpio@deadbeef {
compatible = "vnd,gpio";
gpio-controller;
reg = <0xdeadbeef 0x1000>;
#gpio-cells = <0x2>;
label = "TEST_GPIO_1";
status = "okay";
};
test_i2c: i2c@11112222 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "vnd,i2c";
reg = <0x11112222 0x1000>;
label = "TEST_I2C_CTLR";
status = "okay";
clock-frequency = <100000>;
test_i2c_sx1509b: sx1509b@0 {
compatible = "semtech,sx1509b";
label = "SX1509B";
reg = <0x0>;
#gpio-cells = <2>;
ngpios = <16>;
gpio-controller;
};
test_i2c_pcal6408a: pcal6408a@1 {
compatible = "nxp,pcal6408a";
label = "PCAL6408A";
reg = <0x1>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
int-gpios = <&test_gpio 0 0>;
reset-gpios = <&test_gpio 0 0>;
};
test_i2c_pca95xx: pca95xx@20 {
compatible = "nxp,pca95xx";
label = "PCA95XX";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
interrupt-gpios = <&test_gpio 0 0>;
};
test_i2c_pca953x: pca953x@70 {
compatible = "ti,tca9538";
reg = <0x70>;
label = "PCA953X";
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
nint-gpios = <&test_gpio 0 0>;
};
test_i2c_mcp230xx: mcp230xx@0 {
compatible = "microchip,mcp230xx";
label = "MCP230XX";
reg = <0x0>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
};
test_i2c_fxl6408: fxl6408@43 {
status = "okay";
compatible = "fcs,fxl6408";
label = "FXL6408";
reg = <0x43>;
ngpios = <8>;
#gpio-cells = <2>;
gpio-controller;
};
test_i2c_nct3807: nct3807@72 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "nuvoton,nct38xx-gpio";
reg = <0x72>;
label = "NCT3807_0";
gpio@0 {
compatible = "nuvoton,nct38xx-gpio-port";
reg = <0x0>;
label = "NCT3807_0_GPIO0";
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
pin_mask = <0xff>;
pinmux_mask = <0xf7>;
};
gpio@1 {
compatible = "nuvoton,nct38xx-gpio-port";
reg = <0x1>;
label = "NCT3807_0_GPIO1";
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
pin_mask = <0xff>;
};
};
test_i2c_nct3808_p1: nct3808_0_P1@71 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "nuvoton,nct38xx-gpio";
reg = <0x71>;
label = "NCT3808_0_P1";
gpio@0 {
compatible = "nuvoton,nct38xx-gpio-port";
reg = <0x0>;
label = "NCT3808_0_P1_GPIO0";
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
pin_mask = <0xdc>;
pinmux_mask = <0xff>;
};
};
test_i2c_nct3808_p2: nct3808_0_P2@75 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "nuvoton,nct38xx-gpio";
reg = <0x75>;
label = "NCT3808_0_P2";
gpio@0 {
compatible = "nuvoton,nct38xx-gpio-port";
reg = <0x0>;
label = "NCT3808_0_P2_GPIO0";
gpio-controller;
#gpio-cells = <2>;
ngpios = <8>;
pin_mask = <0xdc>;
pinmux_mask = <0xff>;
};
};
};
test_spi: spi@33334444 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "vnd,spi";
reg = <0x33334444 0x1000>;
label = "TEST_SPI_CTLR";
status = "okay";
clock-frequency = <2000000>;
/* one entry for every devices at spi.dtsi */
cs-gpios = <&test_gpio 0 0 &test_gpio 0 0>;
test_spi_mcp23s17: mcp23s17@0 {
compatible = "microchip,mcp23s17";
label = "GPIO_E0";
spi-max-frequency = <0>;
reg = <0x0>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
};
test_spi_mcp23sxx: mcp23sxx@0 {
compatible = "microchip,mcp23sxx";
label = "GPIO_E1";
spi-max-frequency = <0>;
reg = <0x0>;
gpio-controller;
#gpio-cells = <2>;
ngpios = <16>;
};
};
};
};