| # -------------------------------------------------------------------------- # |
| # |
| # Copyright (C) 1991-2016 Altera Corporation. All rights reserved. |
| # Your use of Altera Corporation's design tools, logic functions |
| # and other software and tools, and its AMPP partner logic |
| # functions, and any output files from any of the foregoing |
| # (including device programming or simulation files), and any |
| # associated documentation or information are expressly subject |
| # to the terms and conditions of the Altera Program License |
| # Subscription Agreement, the Altera Quartus Prime License Agreement, |
| # the Altera MegaCore Function License Agreement, or other |
| # applicable license agreement, including, without limitation, |
| # that your use is for the sole purpose of programming logic |
| # devices manufactured by Altera and sold by Altera or its |
| # authorized distributors. Please refer to the applicable |
| # agreement for further details. |
| # |
| # -------------------------------------------------------------------------- # |
| # |
| # Quartus Prime |
| # Version 16.0.0 Build 208 04/06/2016 SJ Standard Edition |
| # Date created = 16:01:48 April 27, 2016 |
| # |
| # -------------------------------------------------------------------------- # |
| |
| QUARTUS_VERSION = "16.0" |
| DATE = "16:01:48 April 27, 2016" |
| |
| # Revisions |
| |
| PROJECT_REVISION = "ghrd_10m50da" |
