blob: 055c0ffe620e318c9801ea82436c23fceed77c2a [file] [log] [blame]
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <nxp/nxp_rt11xx.dtsi>
/* Configure ARM PLL to 600MHz */
&arm_pll {
clock-mult = <100>;
clock-div = <4>;
};
/* Set OCRAM regions/sizes for RT1160. Combines OCRAM1/OCRAM2/OCRAM M7 (FlexRAM ECC).
* ECC must be left disabled for this configuration
*/
/ {
soc {
ocram_combined: ocram@20340000 {
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "OCRAMCOMBINED";
reg = <0x20340000 DT_SIZE_K(256)>;
};
};
};