blob: d5c5ac96c18c9f69034242d165d93525deedd8c2 [file] [log] [blame]
/*
* Copyright 2024 NXP
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <nxp/nxp_rt11xx.dtsi>
/* Configure ARM PLL to 996MHz */
&arm_pll {
clock-mult = <83>;
clock-div = <2>;
};
/* Set OCRAM regions/sizes for RT1170 */
/ {
soc {
ocram1: ocram@20240000 {
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "OCRAM1";
reg = <0x20240000 DT_SIZE_K(512)>;
};
ocram2: ocram@202c0000 {
compatible = "zephyr,memory-region", "mmio-sram";
zephyr,memory-region = "OCRAM2";
reg = <0x202c0000 DT_SIZE_K(512)>;
};
};
};