blob: 44742e388684fb6b34bedae6b20bf40dcc7a3413 [file] [log] [blame]
/*
* Copyright (c) 2022 Seco Spa
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <mem.h>
#include <st/f3/stm32f302.dtsi>
#include <zephyr/dt-bindings/adc/stm32l4_adc.h>
/ {
sram0: memory@20000000 {
reg = <0x20000000 DT_SIZE_K(40)>;
};
soc {
flash-controller@40022000 {
flash0: flash@8000000 {
reg = <0x08000000 DT_SIZE_K(256)>;
};
};
timers2: timers@40000000 {
clocks = <&rcc STM32_CLOCK(APB1, 0)>,
<&rcc STM32_SRC_TIMPCLK1 TIM2_SEL(0)>;
};
timers3: timers@40000400 {
compatible = "st,stm32-timers";
reg = <0x40000400 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 1)>,
<&rcc STM32_SRC_TIMPCLK1 TIM3_4_SEL(0)>;
resets = <&rctl STM32_RESET(APB1, 1)>;
interrupts = <29 0>;
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
#pwm-cells = <3>;
};
counter {
compatible = "st,stm32-counter";
status = "disabled";
};
qdec {
compatible = "st,stm32-qdec";
st,input-filter-level = <NO_FILTER>;
status = "disabled";
};
};
timers4: timers@40000800 {
compatible = "st,stm32-timers";
reg = <0x40000800 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 2)>,
<&rcc STM32_SRC_TIMPCLK1 TIM3_4_SEL(0)>;
resets = <&rctl STM32_RESET(APB1, 2)>;
interrupts = <30 0>;
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
#pwm-cells = <3>;
};
qdec {
compatible = "st,stm32-qdec";
st,input-filter-level = <NO_FILTER>;
status = "disabled";
};
};
dma2: dma@40020400 {
compatible = "st,stm32-dma-v2bis";
#dma-cells = <2>;
reg = <0x40020400 0x400>;
clocks = <&rcc STM32_CLOCK(AHB1, 1)>;
interrupts = <56 0 57 0 58 0 59 0 60 0>;
status = "disabled";
};
uart5: serial@40005000 {
compatible = "st,stm32-uart";
reg = <0x40005000 0x400>;
clocks = <&rcc STM32_CLOCK(APB1, 20)>;
interrupts = <53 0>;
status = "disabled";
};
pinctrl: pin-controller@48000000 {
gpioe: gpio@48001000 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48001000 0x400>;
clocks = <&rcc STM32_CLOCK(AHB1, 21)>;
};
};
};
};
/delete-node/ &i2c3;
/delete-node/ &smbus3;