blob: 5bb2c70b98e79e989ce5c441b5260657d2331d11 [file] [log] [blame]
/*
* Copyright (c) 2017 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <arm/armv7-m.dtsi>
#include <st/mem.h>
/ {
flash0: flash {
reg = <0x08000000 DT_FLASH_SIZE>;
};
sram0: memory {
reg = <0x20000000 DT_SRAM_SIZE>;
};
soc {
usart1: serial@40013800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40013800 0x400>;
interrupts = <37 0>;
status = "disabled";
label = "UART_1";
};
usart2: serial@40004400 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004400 0x400>;
interrupts = <38 0>;
status = "disabled";
label = "UART_2";
};
usart3: serial@40004800 {
compatible = "st,stm32-usart", "st,stm32-uart";
reg = <0x40004800 0x400>;
interrupts = <39 0>;
status = "disabled";
label = "UART_3";
};
uart4: serial@40004c00 {
compatible = "st,stm32-uart";
reg = <0x40004c00 0x400>;
interrupts = <52 0>;
status = "disabled";
label = "UART_4";
};
uart5: serial@40005000 {
compatible = "st,stm32-uart";
reg = <0x40005000 0x400>;
interrupts = <53 0>;
status = "disabled";
label = "UART_5";
};
};
};
&nvic {
arm,num-irq-priority-bits = <4>;
};