| /* |
| * Copyright (c) 2019 Sierra Wireless |
| * Copyright (c) 2020 Thomas Stranger |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <st/g0/stm32g050.dtsi> |
| |
| / { |
| soc { |
| compatible = "st,stm32g070", "st,stm32g0", "simple-bus"; |
| |
| usart3: serial@40004800 { |
| compatible = "st,stm32-usart", "st,stm32-uart"; |
| reg = <0x40004800 0x400>; |
| clocks = <&rcc STM32_CLOCK(APB1, 18U)>; |
| resets = <&rctl STM32_RESET(APB1L, 18U)>; |
| interrupts = <29 0>; |
| status = "disabled"; |
| }; |
| |
| usart4: serial@40004c00 { |
| compatible = "st,stm32-usart", "st,stm32-uart"; |
| reg = <0x40004c00 0x400>; |
| clocks = <&rcc STM32_CLOCK(APB1, 19U)>; |
| resets = <&rctl STM32_RESET(APB1L, 19U)>; |
| interrupts = <29 0>; |
| status = "disabled"; |
| }; |
| |
| timers15: timers@40014000 { |
| compatible = "st,stm32-timers"; |
| reg = <0x40014000 0x400>; |
| clocks = <&rcc STM32_CLOCK(APB1_2, 16U)>; |
| resets = <&rctl STM32_RESET(APB1H, 16U)>; |
| interrupts = <20 0>; |
| interrupt-names = "global"; |
| st,prescaler = <0>; |
| status = "disabled"; |
| |
| pwm { |
| compatible = "st,stm32-pwm"; |
| status = "disabled"; |
| #pwm-cells = <3>; |
| }; |
| }; |
| |
| dmamux1: dmamux@40020800 { |
| dma-requests= <53>; |
| }; |
| }; |
| }; |
