boards/st/nucleo_g431rb/nucleo_g431rb.dts

/*
 * Copyright (c) 2019 Richard Osterloh <richard.osterloh@gmail.com>
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;
#include <st/g4/stm32g431Xb.dtsi>
#include <st/g4/stm32g431r(6-8-b)tx-pinctrl.dtsi>
#include "arduino_r3_connector.dtsi"
#include "st_morpho_connector.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>

/ {
	model = "STMicroelectronics STM32G431RB-NUCLEO board";
	compatible = "st,stm32g431rb-nucleo";

	chosen {
		zephyr,console = &lpuart1;
		zephyr,shell-uart = &lpuart1;
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,code-partition = &slot0_partition;
	};

	leds: leds {
		compatible = "gpio-leds";
		green_led: led_0 {
			gpios = <&gpioa 5 GPIO_ACTIVE_HIGH>;
			label = "User LD2";
		};
	};

	pwmleds {
		compatible = "pwm-leds";

		green_pwm_led: green_pwm_led {
			pwms = <&pwm2 1 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
		};
	};

	gpio_keys {
		compatible = "gpio-keys";
		user_button: button {
			label = "User";
			gpios = <&gpioc 13 GPIO_ACTIVE_HIGH>;
			zephyr,code = <INPUT_KEY_0>;
		};
	};

	aliases {
		led0 = &green_led;
		mcuboot-led0 = &green_led;
		pwm-led0 = &green_pwm_led;
		sw0 = &user_button;
		watchdog0 = &iwdg;
	};
};

&clk_lsi {
	status = "okay";
};

&clk_lse {
	status = "okay";
};

&clk_hsi48 {
	status = "okay";
};

&clk_hse {
	clock-frequency = <DT_FREQ_M(24)>;
	status = "okay";
};

&pll {
	div-m = <6>;
	mul-n = <85>;
	div-p = <7>;
	div-q = <2>;
	div-r = <2>;
	clocks = <&clk_hse>;
	status = "okay";
};

&rcc {
	clocks = <&pll>;
	clock-frequency = <DT_FREQ_M(170)>;
	ahb-prescaler = <1>;
	apb1-prescaler = <1>;
	apb2-prescaler = <1>;
};

&rng {
	clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x04000000>,
		 <&rcc STM32_SRC_HSI48 CLK48_SEL(0)>;
	status = "okay";
};

&usart1 {
	pinctrl-0 = <&usart1_tx_pc4 &usart1_rx_pc5>;
	pinctrl-names = "default";
	current-speed = <115200>;
	status = "okay";
};

&lpuart1 {
	pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>;
	pinctrl-names = "default";
	current-speed = <115200>;
	status = "okay";
};

&i2c1 {
	pinctrl-0 = <&i2c1_scl_pb8 &i2c1_sda_pb9>;
	pinctrl-names = "default";
	status = "okay";
};

&spi1 {
	pinctrl-0 = <&spi1_sck_pa5 &spi1_miso_pa6 &spi1_mosi_pa7>;
	pinctrl-names = "default";
	cs-gpios = <&gpiob 6 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
	status = "okay";
};

&spi2 {
	pinctrl-0 = <&spi2_nss_pb12 &spi2_sck_pb13
		     &spi2_miso_pb14 &spi2_mosi_pb15>;
	pinctrl-names = "default";
	status = "okay";
};

&spi3 {
	/* SPI3 on the ST Morpho Connector CN7 pins 17, 1, 2, 3*/
	pinctrl-0 = <&spi3_nss_pa15 &spi3_sck_pc10
		     &spi3_miso_pc11 &spi3_mosi_pc12>;
	pinctrl-names = "default";
	status = "okay";
};

&timers2 {
	status = "okay";

	pwm2: pwm {
		status = "okay";
		pinctrl-0 = <&tim2_ch1_pa5>;
		pinctrl-names = "default";
	};
};

stm32_lp_tick_source: &lptim1 {
	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
		 <&rcc STM32_SRC_LSE LPTIM1_SEL(3)>;
	status = "okay";
};

&rtc {
	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000400>,
		 <&rcc STM32_SRC_LSI RTC_SEL(2)>;
	status = "okay";
};

&flash0 {

	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		boot_partition: partition@0 {
			label = "mcuboot";
			reg = <0x00000000 DT_SIZE_K(34)>;
		};
		slot0_partition: partition@8800 {
			label = "image-0";
			reg = <0x00008800 DT_SIZE_K(48)>;
		};
		slot1_partition: partition@14800 {
			label = "image-1";
			reg = <0x00014800 DT_SIZE_K(42)>;
		};
		/* Set 4Kb of storage at the end of the 128Kb of flash */
		storage_partition: partition@1f000 {
			label = "storage";
			reg = <0x0001f000 DT_SIZE_K(4)>;
		};
	};
};

&iwdg {
	status = "okay";
};

&dac1 {
	status = "okay";
	pinctrl-0 = <&dac1_out1_pa4>;
	pinctrl-names = "default";
};