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# Nordic Semiconductor nRFx MCU line
# Copyright (c) 2016-2018 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config SOC_FAMILY_NRF
select SOC_COMPATIBLE_NRF
select PLATFORM_SPECIFIC_INIT
bool
if SOC_FAMILY_NRF
config SOC_FAMILY
string
default "nordic_nrf"
source "soc/arm/nordic_nrf/Kconfig.peripherals"
source "soc/arm/nordic_nrf/*/Kconfig.soc"
config NRF_MPU_FLASH_REGION_SIZE
hex
default 0x1000
depends on HAS_HW_NRF_MPU
help
FLASH region size for the NRF_MPU peripheral.
config NRF_BPROT_FLASH_REGION_SIZE
hex
default $(dt_node_int_prop_hex,$(DT_CHOSEN_ZEPHYR_FLASH),erase-block-size)
depends on HAS_HW_NRF_BPROT
help
FLASH region size for the NRF_BPROT peripheral (nRF52).
config NRF_ACL_FLASH_REGION_SIZE
hex
default $(dt_node_int_prop_hex,$(DT_CHOSEN_ZEPHYR_FLASH),erase-block-size)
depends on HAS_HW_NRF_ACL
help
FLASH region size for the NRF_ACL peripheral.
config NFCT_PINS_AS_GPIOS
bool "NFCT pins as GPIOs"
depends on HAS_HW_NRF_NFCT
help
Two pins are usually reserved for NFC in SoCs that implement the
NFCT peripheral. This option switches them to normal GPIO mode.
HW enabling happens once in the device lifetime, during the first
system startup. Disabling this option will not switch back these
pins to NFCT mode. Doing this requires UICR erase prior to
flashing device using the image which has this option disabled.
NFC pins in nRF52 series: P0.09 and P0.10
NFC pins in nRF5340: P0.02 and P0.03
endif # SOC_FAMILY_NRF