| /* |
| * Copyright (c) 2021 Linaro Limited |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| /* |
| * Warning: This overlay performs configuration from clean sheet. |
| * It is assumed that it is applied after clear_clocks.overlay file. |
| */ |
| |
| &clk_lse { |
| status = "okay"; |
| }; |
| |
| &clk_msis { |
| status = "okay"; |
| msi-range = <4>; |
| msi-pll-mode; |
| }; |
| |
| &pll1 { |
| div-m = <1>; |
| mul-n = <80>; |
| div-q = <4>; |
| div-r = <4>; |
| clocks = <&clk_msis>; |
| status = "okay"; |
| }; |
| |
| &rcc { |
| clocks = <&pll1>; |
| ahb-prescaler = <2>; /* Use AHB prescaler to reduce HCLK */ |
| clock-frequency = <DT_FREQ_M(40)>; |
| apb1-prescaler = <1>; |
| apb2-prescaler = <1>; |
| apb3-prescaler = <1>; |
| }; |
