| # Copyright 2020-2023 NXP |
| # Copyright (c) 2021 Basalte bv |
| # Copyright (c) 2023, ithinx GmbH |
| # Copyright (c) 2023, Tonies GmbH |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| if DT_HAS_NXP_IMX_FLEXSPI_ENABLED |
| |
| config MEMC_MCUX_FLEXSPI_W956A8MBYA |
| bool "MCUX FlexSPI Winbond W956A8MBYA HyperRAM driver" |
| default y |
| depends on DT_HAS_NXP_IMX_FLEXSPI_W956A8MBYA_ENABLED |
| select MEMC_MCUX_FLEXSPI |
| |
| config MEMC_MCUX_FLEXSPI_S27KS0641 |
| bool "MCUX FlexSPI Cypress S27KS0641 HyperRAM driver" |
| default y |
| depends on DT_HAS_NXP_IMX_FLEXSPI_S27KS0641_ENABLED |
| select MEMC_MCUX_FLEXSPI |
| |
| config MEMC_MCUX_FLEXSPI_APS6408L |
| bool "MCUX FlexSPI AP Memory APS6408L pSRAM driver" |
| default y |
| depends on DT_HAS_NXP_IMX_FLEXSPI_APS6408L_ENABLED |
| select MEMC_MCUX_FLEXSPI |
| |
| config MEMC_MCUX_FLEXSPI_IS66WVQ8M4 |
| bool "MCUX FlexSPI ISSI IS66WVQ8M4 pSRAM driver" |
| default y |
| depends on DT_HAS_NXP_IMX_FLEXSPI_IS66WVQ8M4_ENABLED |
| select MEMC_MCUX_FLEXSPI |
| |
| config MEMC_MCUX_FLEXSPI_APS6404L |
| bool "MCUX FlexSPI AP Memory APS6404L pSRAM driver" |
| default y |
| depends on DT_HAS_NXP_IMX_FLEXSPI_APS6404L_ENABLED |
| select MEMC_MCUX_FLEXSPI |
| |
| config MEMC_MCUX_FLEXSPI_INIT_PRIORITY |
| int "MCUX FLEXSPI MEMC driver initialization priority" |
| default MEMC_INIT_PRIORITY |
| help |
| Initialization priority for FlexSPI MEMC driver. In cases where the |
| flash driver must initialize before the MEMC RAM driver, |
| initialization priorities can be set such that |
| MEMC_MCUX_FLEXSPI_INIT_PRIORITY < FLASH_INIT_PRIORITY < |
| MEMC_INIT_PRIORITY |
| |
| config MEMC_MCUX_FLEXSPI_INIT_XIP |
| bool "Initialize FLEXSPI when using device for XIP" |
| help |
| Initialize the FLEXSPI device even when using it for XIP. If this |
| Kconfig is enabled, the user must ensure that the pin control |
| state used does not reconfigure the pins used to interface with |
| the flash device used for XIP, and that the configuration settings |
| used for the FLEXSPI are compatible with those needed for XIP from |
| the flash device. |
| |
| config FLASH_MCUX_FLEXSPI_FORCE_USING_OVRDVAL |
| bool "Force using the FLEXSPI Target Clock Delay Line Override Value" |
| help |
| Enable this setting to force using a specific raw value for the OVRDVAL |
| field in the DLLCR registers. |
| |
| This option gives more granularity than the 'data-valid-time' field in |
| the dts. The unit of 'data-valid-time' is nanoseconds while the unit of |
| OVRDVAL are raw delay cells. |
| |
| Normally the 'data-valid-time' on any 'nxp,imx-flexspi-device' device |
| will set the OVRDVAL and OVRDEN fields in the DLLCR register |
| but works only when the 'rx-clock-source' is configured to '#0 External |
| input from DQS pad' and the frequency <= 100MHz. |
| |
| config FLASH_MCUX_FLEXSPI_OVRDVAL |
| int "FLEXSPI Target Clock Delay Line Override Value" |
| range 0 63 |
| default 27 |
| depends on FLASH_MCUX_FLEXSPI_FORCE_USING_OVRDVAL |
| help |
| Raw value to be stored in the DDLCR->OVRDVAL field. |
| |
| config MEMC_MCUX_FLEXSPI |
| bool |
| select PINCTRL |
| |
| # Avoid RWW hazards by defaulting logging to disabled |
| choice MEMC_LOG_LEVEL_CHOICE |
| default MEMC_LOG_LEVEL_OFF if FLASH_MCUX_FLEXSPI_XIP |
| endchoice |
| |
| endif # DT_HAS_NXP_IMX_FLEXSPI_ENABLED |