soc/st/stm32/stm32g0x/Kconfig.defconfig

# STMicroelectronics STM32G0 MCU line

# Copyright (c) 2019 Philippe Retornaz <philippe@shapescale.com>
# Copyright (c) 2019 STMicroelectronics
# Copyright (c) 2021 G-Technologies Sdn. Bhd.
# SPDX-License-Identifier: Apache-2.0

if SOC_SERIES_STM32G0X

rsource "Kconfig.defconfig.stm32g0*"

if UART_STM32

configdefault SHARED_IRQ_MAX_NUM_CLIENTS
	# LPUART1 - USART3/4/5/6 instances are all enabled
	default 5 if $(dt_nodelabel_enabled,usart3) && $(dt_nodelabel_enabled,usart4) && $(dt_nodelabel_enabled,usart5) && $(dt_nodelabel_enabled,usart6) && $(dt_nodelabel_enabled,lpuart1)
	# 4 out of 5 USART instances are enabled
	default 4 if $(dt_nodelabel_enabled,usart3) && $(dt_nodelabel_enabled,usart4) && $(dt_nodelabel_enabled,usart5) && $(dt_nodelabel_enabled,usart6)
	default 4 if $(dt_nodelabel_enabled,usart3) && $(dt_nodelabel_enabled,usart4) && $(dt_nodelabel_enabled,usart5) && $(dt_nodelabel_enabled,lpuart1)
	default 4 if $(dt_nodelabel_enabled,usart3) && $(dt_nodelabel_enabled,usart4) && $(dt_nodelabel_enabled,usart6) && $(dt_nodelabel_enabled,lpuart1)
	default 4 if $(dt_nodelabel_enabled,usart3) && $(dt_nodelabel_enabled,usart5) && $(dt_nodelabel_enabled,usart6) && $(dt_nodelabel_enabled,lpuart1)
	default 4 if $(dt_nodelabel_enabled,usart4) && $(dt_nodelabel_enabled,usart5) && $(dt_nodelabel_enabled,usart6) && $(dt_nodelabel_enabled,lpuart1)
	# 3 out of 5 USART instances are enabled
	default 3 if $(dt_nodelabel_enabled,usart3) && $(dt_nodelabel_enabled,usart4) && $(dt_nodelabel_enabled,usart5)
	default 3 if $(dt_nodelabel_enabled,usart3) && $(dt_nodelabel_enabled,usart4) && $(dt_nodelabel_enabled,usart6)
	default 3 if $(dt_nodelabel_enabled,usart3) && $(dt_nodelabel_enabled,usart5) && $(dt_nodelabel_enabled,usart6)
	default 3 if $(dt_nodelabel_enabled,usart3) && $(dt_nodelabel_enabled,usart4) && $(dt_nodelabel_enabled,lpuart1)
	default 3 if $(dt_nodelabel_enabled,usart3) && $(dt_nodelabel_enabled,usart5) && $(dt_nodelabel_enabled,lpuart1)
	default 3 if $(dt_nodelabel_enabled,usart3) && $(dt_nodelabel_enabled,usart6) && $(dt_nodelabel_enabled,lpuart1)
	default 3 if $(dt_nodelabel_enabled,usart4) && $(dt_nodelabel_enabled,usart5) && $(dt_nodelabel_enabled,usart6)
	default 3 if $(dt_nodelabel_enabled,usart4) && $(dt_nodelabel_enabled,usart5) && $(dt_nodelabel_enabled,lpuart1)
	default 3 if $(dt_nodelabel_enabled,usart4) && $(dt_nodelabel_enabled,usart6) && $(dt_nodelabel_enabled,lpuart1)
	default 3 if $(dt_nodelabel_enabled,usart5) && $(dt_nodelabel_enabled,usart6) && $(dt_nodelabel_enabled,lpuart1)

config SHARED_INTERRUPTS
	# LPUART1 - USART3/4/5/6 : irq 29
	default y if $(dt_nodelabel_enabled,usart3) && $(dt_nodelabel_enabled,usart4)
	default y if $(dt_nodelabel_enabled,usart3) && $(dt_nodelabel_enabled,usart5)
	default y if $(dt_nodelabel_enabled,usart3) && $(dt_nodelabel_enabled,usart6)
	default y if $(dt_nodelabel_enabled,usart3) && $(dt_nodelabel_enabled,lpuart1)
	default y if $(dt_nodelabel_enabled,usart4) && $(dt_nodelabel_enabled,usart5)
	default y if $(dt_nodelabel_enabled,usart4) && $(dt_nodelabel_enabled,usart6)
	default y if $(dt_nodelabel_enabled,usart4) && $(dt_nodelabel_enabled,lpuart1)
	default y if $(dt_nodelabel_enabled,usart5) && $(dt_nodelabel_enabled,usart6)
	default y if $(dt_nodelabel_enabled,usart5) && $(dt_nodelabel_enabled,lpuart1)
	default y if $(dt_nodelabel_enabled,usart6) && $(dt_nodelabel_enabled,lpuart1)
	# USART2 - LPUART2 : irq 28
	default y if $(dt_nodelabel_enabled,lpuart2) && $(dt_nodelabel_enabled,usart2)

endif # UART_STM32

# Default disable flash prefetch for G0Bx and G0Cx since ErrataSheet ES0548/ES0549,
# section "Prefetch failure when branching across flash memory banks
# which causes code execution corruption and may lead to HardFault interrupt"
# Project may override this configuration if sure no cross-bank prefetch access is
# awaited.
config STM32_FLASH_PREFETCH
	default n if SOC_STM32G0B0XX || SOC_STM32G0B1XX || SOC_STM32G0C1XX

endif # SOC_SERIES_STM32G0X