| ifeq ($(KBUILD_VERBOSE),1) |
| GENIDT_EXTRA_ARGS := -d |
| else |
| GENIDT_EXTRA_ARGS := |
| endif |
| |
| ifeq ($(PREBUILT_HOST_TOOLS),) |
| GENIDT := $(ZEPHYR_BASE)/scripts/gen_idt/gen_idt |
| else |
| GENIDT := $(PREBUILT_HOST_TOOLS)/gen_idt |
| endif |
| |
| OUTPUT_FORMAT ?= elf32-i386 |
| OUTPUT_ARCH ?= i386 |
| |
| quiet_cmd_gen_idt = SIDT $@ |
| cmd_gen_idt = \ |
| ( \ |
| $(OBJCOPY) -I $(OUTPUT_FORMAT) -O binary -j intList $< isrList.bin && \ |
| $(GENIDT) -i isrList.bin -n $(CONFIG_IDT_NUM_VECTORS) -o staticIdt.bin \ |
| -m irq_int_vector_map.bin \ |
| -l $(CONFIG_MAX_IRQ_LINES) $(GENIDT_EXTRA_ARGS) && \ |
| $(OBJCOPY) -I binary -B $(OUTPUT_ARCH) -O $(OUTPUT_FORMAT) \ |
| --rename-section .data=staticIdt staticIdt.bin staticIdt.o && \ |
| $(OBJCOPY) -I binary -B $(OUTPUT_ARCH) -O $(OUTPUT_FORMAT) \ |
| --rename-section .data=irq_int_vector_map irq_int_vector_map.bin \ |
| irq_int_vector_map.o && \ |
| rm staticIdt.bin irq_int_vector_map.bin isrList.bin \ |
| ) |
| |
| $(GENIDT): |
| $(Q)$(MAKE) $(build)=$(ZEPHYR_BASE)/scripts/gen_idt |
| |
| staticIdt.o: $(PREBUILT_KERNEL) $(GENIDT) |
| $(call cmd,gen_idt) |
| |
| quiet_cmd_lnk_elf = LINK $@ |
| cmd_lnk_elf = \ |
| ( \ |
| $(CC) -T linker.cmd @$(KERNEL_NAME).lnk staticIdt.o \ |
| irq_int_vector_map.o -o $@; \ |
| ${OBJCOPY} --change-section-address intList=${CONFIG_PHYS_LOAD_ADDR} \ |
| $@ elf.tmp; \ |
| $(OBJCOPY) -R intList elf.tmp $@; \ |
| rm elf.tmp \ |
| ) |
| |
| $(KERNEL_ELF_NAME): staticIdt.o linker.cmd |
| $(call cmd,lnk_elf) |
| @$(srctree)/scripts/check_link_map.py $(KERNEL_NAME).map |
| @$(WARN_ABOUT_ASSERT) |
| @$(WARN_ABOUT_DEPRECATION) |
| |