dts/arm/nxp/nxp_kw2xd.dtsi

#include <arm/armv7-m.dtsi>
#include <dt-bindings/i2c/i2c.h>

/ {
	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-m4";
			reg = <0>;
		};
	};

	sram0: memory@20000000 {
		device_type = "memory";
		compatible = "mmio-sram";
		reg = <0x20000000 0x8000>;
	};

	soc {

		mcg: clock-controller@40064000 {
			compatible = "nxp,k64f-mcg";
			reg = <0x40064000 0xd>;
			system-clock-frequency = <48000000>;

			clock-controller;
		};

		clock-controller@40065000 {
			compatible = "nxp,k64f-osc";
			reg = <0x40065000 0x4>;

			enable-external-reference;
		};

		rtc@4003d000 {
			compatible = "nxp,k64f-rtc";
			reg = <0x4003d000 0x808>;
			clock-frequency = <32768>;
		};

		sim: sim@40047000 {
			compatible = "nxp,k64f-sim";
			reg = <0x40047000 0x1060>;

			clk-divider-core = <1>;
			clk-divider-bus = <1>;
			clk-divider-flash = <2>;

			clock-controller;
			#clock-cells = <2>;
		};

		flash-controller@4001f000 {
			compatible = "nxp,k64f-flash-controller";
			reg = <0x4001f000 0x27c>;
			interrupts = <18 0>, <19 0>;

			#address-cells = <1>;
			#size-cells = <1>;

			flash0: flash@0 {
				reg = <0 0x80000>;
			};
		};

		i2c0: i2c@40066000 {
			compatible = "nxp,kinetis-i2c";
			clock-frequency = <I2C_BITRATE_STANDARD>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x40066000 0x1000>;
			interrupts = <24 0>;
			label = "I2C_0";
			status = "disabled";
		};

		i2c1: i2c@40067000 {
			compatible = "nxp,kinetis-i2c";
			clock-frequency = <I2C_BITRATE_STANDARD>;
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x40067000 0x1000>;
			interrupts = <25 0>;
			label = "I2C_1";
			status = "disabled";
		};

		uart0: uart@4006a000 {
			compatible = "nxp,kinetis-uart";
			reg = <0x4006a000 0x1000>;
			interrupts = <31 0>, <32 0>;
			interrupt-names = "status", "error";
			label = "UART_0";

			pinctrl-0 = <&uart0_default>;
			pinctrl-names = "default";

			status = "disabled";
		};

		uart1: uart@4006b000 {
			compatible = "nxp,kinetis-uart";
			reg = <0x4006b000 0x1000>;
			interrupts = <33 0>, <34 0>;
			interrupt-names = "status", "error";
			label = "UART_1";

			status = "disabled";
		};

		uart2: uart@4006c000 {
			compatible = "nxp,kinetis-uart";
			reg = <0x4006c000 0x1000>;
			interrupts = <35 0>, <36 0>;
			interrupt-names = "status", "error";
			label = "UART_2";

			pinctrl-0 = <&uart2_default>;
			pinctrl-names = "default";

			status = "disabled";
		};

		pinmux_a: pinmux@40049000 {
			compatible = "nxp,kinetis-pinmux";
			reg = <0x40049000 0xd0>;
			clocks = <&sim 0x1038 9>;

			uart0_default: uart0_default {
				rx-tx {
					pins = <1>, <2>;
					function = <2>;
				};
			};
		};

		pinmux_b: pinmux@4004a000 {
			compatible = "nxp,kinetis-pinmux";
			reg = <0x4004a000 0xd0>;
			clocks = <&sim 0x1038 10>;

			spi1_default: spi1_default {
				miso-mosi-clk {
					pins = <17>, <16>, <11>;
					function = <2>;
				};
			};
		};

		pinmux_c: pinmux@4004b000 {
			compatible = "nxp,kinetis-pinmux";
			reg = <0x4004b000 0xd0>;
			clocks = <&sim 0x1038 11>;
		};

		pinmux_d: pinmux@4004c000 {
			compatible = "nxp,kinetis-pinmux";
			reg = <0x4004c000 0xd0>;
			clocks = <&sim 0x1038 12>;

			uart2_default: uart2_default {
				rx-tx {
					pins = <2>, <3>;
					function = <3>;
				};
			};
		};

		pinmux_e: pinmux@4004d000 {
			compatible = "nxp,kinetis-pinmux";
			reg = <0x4004d000 0xd0>;
			clocks = <&sim 0x1038 13>;
		};

		gpioa: gpio@400ff000 {
			compatible = "nxp,kinetis-gpio";
			reg = <0x400ff000 0x40>;
			interrupts = <59 2>;

			gpio-controller;
			#gpio-cells = <2>;
		};

		gpiob: gpio@400ff040 {
			compatible = "nxp,kinetis-gpio";
			reg = <0x400ff040 0x40>;
			interrupts = <60 2>;

			gpio-controller;
			#gpio-cells = <2>;
		};

		gpioc: gpio@400ff080 {
			compatible = "nxp,kinetis-gpio";
			reg = <0x400ff080 0x40>;
			interrupts = <61 2>;

			gpio-controller;
			#gpio-cells = <2>;
		};

		gpiod: gpio@400ff0c0 {
			compatible = "nxp,kinetis-gpio";
			reg = <0x400ff0c0 0x40>;
			interrupts = <62 2>;

			gpio-controller;
			#gpio-cells = <2>;
		};

		gpioe: gpio@400ff100 {
			compatible = "nxp,kinetis-gpio";
			reg = <0x400ff100 0x40>;
			interrupts = <63 2>;

			gpio-controller;
			#gpio-cells = <2>;
		};

		spi0: spi@4002c000 {
			compatible = "nxp,k64f-spi";
			reg = <0x4002c000 0x88>;
			interrupts = <26 0>;
			clocks = <&sim 0x103C 12>;		/* clk gate */
			status = "disabled";
		};

		spi1: spi@4002d000 {
			compatible = "nxp,k64f-spi";
			reg = <0x4002d000 0x88>;
			interrupts = <27 0>;
			clocks = <&sim 0x103C 13>;		/* clk gate */

			cs = <&gpiob 10 0>;
			pinctrl-0 = <&spi1_default>;
			pinctrl-names = "default";
		};

		wdog: watchdog@40052000 {
			compatible = "nxp,k64f-watchdog";
			reg = <0x40052000 16>;
			clock-source = <0>;	/* LPO 1kHz or other source */
			reload-counter = <40000>;
			start-on-boot;
			prescaler = <2>;
		};

		pwm0: pwm@40038000{
			compatible = "nxp,kinetis-ftm";
			reg = <0x40038000 0x98>;
			interrupts = <42 0>;
			label = "PWM_0";
			/* channel information needed - fixme */
			status = "disabled";
		};

		pwm1: pwm@40039000{
			compatible = "nxp,kinetis-ftm";
			reg = <0x40039000 0x98>;
			interrupts = <43 0>;
			label = "PWM_1";
			/* channel information needed - fixme */
			status = "disabled";
		};

		pwm2: pwm@4003a000{
			compatible = "nxp,kinetis-ftm";
			reg = <0x4003a000 0x98>;
			interrupts = <44 0>;
			label = "PWM_2";
			/* channel information needed - fixme */
			status = "disabled";
		};

		adc0: adc@4003b000{
			compatible = "nxp,kinetis-adc16";
			reg = <0x4003b000 0x70>;
			interrupts = <39 0>;
			label = "ADC_0";
			status = "disabled";
		};

	};
};

&nvic {
	arm,num-irq-priority-bits = <4>;
};