| /* |
| * Copyright (c) 2020 Thomas Stranger |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <st/g0/stm32g031.dtsi> |
| |
| / { |
| soc { |
| compatible = "st,stm32g051", "st,stm32g0", "simple-bus"; |
| |
| timers6: timers@40001000 { |
| compatible = "st,stm32-timers"; |
| reg = <0x40001000 0x400>; |
| clocks = <&rcc STM32_CLOCK(APB1, 4U)>; |
| resets = <&rctl STM32_RESET(APB1L, 4U)>; |
| interrupts = <17 0>; |
| interrupt-names = "global"; |
| status = "disabled"; |
| |
| counter { |
| compatible = "st,stm32-counter"; |
| status = "disabled"; |
| }; |
| }; |
| |
| timers7: timers@40001400 { |
| compatible = "st,stm32-timers"; |
| reg = <0x40001400 0x400>; |
| clocks = <&rcc STM32_CLOCK(APB1, 5U)>; |
| resets = <&rctl STM32_RESET(APB1L, 5U)>; |
| interrupts = <18 0>; |
| interrupt-names = "global"; |
| st,prescaler = <0>; |
| status = "disabled"; |
| |
| counter { |
| compatible = "st,stm32-counter"; |
| status = "disabled"; |
| }; |
| }; |
| |
| timers15: timers@40014000 { |
| compatible = "st,stm32-timers"; |
| reg = <0x40014000 0x400>; |
| clocks = <&rcc STM32_CLOCK(APB1_2, 16U)>; |
| resets = <&rctl STM32_RESET(APB1H, 16U)>; |
| interrupts = <20 0>; |
| interrupt-names = "global"; |
| st,prescaler = <0>; |
| status = "disabled"; |
| |
| pwm { |
| compatible = "st,stm32-pwm"; |
| status = "disabled"; |
| #pwm-cells = <3>; |
| }; |
| |
| counter { |
| compatible = "st,stm32-counter"; |
| status = "disabled"; |
| }; |
| }; |
| |
| dac1: dac@40007400 { |
| compatible = "st,stm32-dac"; |
| reg = <0x40007400 0x400>; |
| clocks = <&rcc STM32_CLOCK(APB1, 29U)>; |
| status = "disabled"; |
| #io-channel-cells = <1>; |
| }; |
| |
| dma1: dma@40020000 { |
| interrupts = <9 0 10 0 10 0 11 0 11 0 11 0 11 0>; |
| dma-requests = <7>; |
| }; |
| |
| dmamux1: dmamux@40020800 { |
| dma-channels = <7>; |
| }; |
| }; |
| }; |
