/* | |
* SPDX-License-Identifier: Apache-2.0 | |
* | |
* Copyright (C) 2021, Intel Corporation | |
* | |
*/ | |
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_INTEL_SOCFPGA_CLOCK_H_ | |
#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_INTEL_SOCFPGA_CLOCK_H_ | |
#define INTEL_SOCFPGA_CLOCK_MPU 0 | |
#define INTEL_SOCFPGA_CLOCK_WDT 1 | |
#define INTEL_SOCFPGA_CLOCK_UART 2 | |
#define INTEL_SOCFPGA_CLOCK_MMC 3 | |
#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_INTEL_SOCFPGA_CLOCK_H_ */ |