| /* |
| * Copyright (c) 2022 Nordic Semiconductor |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| &pinctrl { |
| i2c1_default: i2c1_default { |
| group1 { |
| psels = <NRF_PSEL(TWIM_SDA, 1, 2)>, |
| <NRF_PSEL(TWIM_SCL, 1, 3)>; |
| }; |
| }; |
| |
| i2c1_sleep: i2c1_sleep { |
| group1 { |
| psels = <NRF_PSEL(TWIM_SDA, 1, 2)>, |
| <NRF_PSEL(TWIM_SCL, 1, 3)>; |
| low-power-enable; |
| }; |
| }; |
| |
| uart0_default: uart0_default { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 0, 20)>, |
| <NRF_PSEL(UART_RTS, 0, 19)>; |
| }; |
| group2 { |
| psels = <NRF_PSEL(UART_RX, 0, 22)>, |
| <NRF_PSEL(UART_CTS, 0, 21)>; |
| bias-pull-up; |
| }; |
| }; |
| |
| uart0_sleep: uart0_sleep { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 0, 20)>, |
| <NRF_PSEL(UART_RX, 0, 22)>, |
| <NRF_PSEL(UART_RTS, 0, 19)>, |
| <NRF_PSEL(UART_CTS, 0, 21)>; |
| low-power-enable; |
| }; |
| }; |
| |
| pwm0_default: pwm0_default { |
| group1 { |
| psels = <NRF_PSEL(PWM_OUT0, 0, 28)>; |
| }; |
| }; |
| |
| pwm0_sleep: pwm0_sleep { |
| group1 { |
| psels = <NRF_PSEL(PWM_OUT0, 0, 28)>; |
| low-power-enable; |
| }; |
| }; |
| |
| qspi_default: qspi_default { |
| group1 { |
| psels = <NRF_PSEL(QSPI_SCK, 0, 17)>, |
| <NRF_PSEL(QSPI_IO0, 0, 13)>, |
| <NRF_PSEL(QSPI_IO1, 0, 14)>, |
| <NRF_PSEL(QSPI_IO2, 0, 15)>, |
| <NRF_PSEL(QSPI_IO3, 0, 16)>, |
| <NRF_PSEL(QSPI_CSN, 0, 18)>; |
| nordic,drive-mode = <NRF_DRIVE_H0H1>; |
| }; |
| }; |
| |
| qspi_sleep: qspi_sleep { |
| group1 { |
| psels = <NRF_PSEL(QSPI_SCK, 0, 17)>, |
| <NRF_PSEL(QSPI_IO0, 0, 13)>, |
| <NRF_PSEL(QSPI_IO1, 0, 14)>, |
| <NRF_PSEL(QSPI_IO2, 0, 15)>, |
| <NRF_PSEL(QSPI_IO3, 0, 16)>; |
| low-power-enable; |
| }; |
| group2 { |
| psels = <NRF_PSEL(QSPI_CSN, 0, 18)>; |
| low-power-enable; |
| bias-pull-up; |
| }; |
| }; |
| |
| uart1_default: uart1_default { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 1, 1)>, |
| <NRF_PSEL(UART_RTS, 0, 11)>; |
| }; |
| group2 { |
| psels = <NRF_PSEL(UART_RX, 1, 0)>, |
| <NRF_PSEL(UART_CTS, 0, 10)>; |
| bias-pull-up; |
| }; |
| }; |
| |
| uart1_sleep: uart1_sleep { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 1, 1)>, |
| <NRF_PSEL(UART_RX, 1, 0)>, |
| <NRF_PSEL(UART_RTS, 0, 11)>, |
| <NRF_PSEL(UART_CTS, 0, 10)>; |
| low-power-enable; |
| }; |
| }; |
| |
| spi4_default: spi4_default { |
| group1 { |
| psels = <NRF_PSEL(SPIM_SCK, 1, 15)>, |
| <NRF_PSEL(SPIM_MISO, 1, 14)>, |
| <NRF_PSEL(SPIM_MOSI, 1, 13)>; |
| }; |
| }; |
| |
| spi4_sleep: spi4_sleep { |
| group1 { |
| psels = <NRF_PSEL(SPIM_SCK, 1, 15)>, |
| <NRF_PSEL(SPIM_MISO, 1, 14)>, |
| <NRF_PSEL(SPIM_MOSI, 1, 13)>; |
| low-power-enable; |
| }; |
| }; |
| |
| }; |