arch/arm/core/cortex_m/mpu/Kconfig

# Kconfig - Memory Protection Unit (MPU) configuration options

#
# Copyright (c) 2017 Linaro Limited
#
# SPDX-License-Identifier: Apache-2.0
#

if CPU_HAS_MPU

config ARM_MPU
	bool "ARM MPU Support"
	select MEMORY_PROTECTION
	select THREAD_STACK_INFO
	select ARCH_HAS_EXECUTABLE_PAGE_BIT
	select MPU_REQUIRES_POWER_OF_TWO_ALIGNMENT if !(CPU_HAS_NXP_MPU || ARMV8_M_BASELINE || ARMV8_M_MAINLINE)
	select MPU_REQUIRES_NON_OVERLAPPING_REGIONS if CPU_HAS_ARM_MPU && (ARMV8_M_BASELINE || ARMV8_M_MAINLINE)
	help
	  MCU implements Memory Protection Unit.
	  Note that NXP MPU as well as ARMv8-M MPU does not require MPU regions
	  to have power-of-two alignment for base address and region size.
	  In addition to the above, ARMv8-M MPU requires the active MPU regions
	  be non-overlapping.

config ARM_MPU_REGION_MIN_ALIGN_AND_SIZE
	int
	default 32 if ARM_MPU
	default 4
	help
	  Minimum size (and alignment) of an ARM MPU region. Use this
	  symbol to guarantee minimum size and alignment of MPU regions.
	  A minimum 4-byte alignment is enforced in ARM builds without
	  support for Memory Protection.

if ARM_MPU

config MPU_STACK_GUARD
	bool "Thread Stack Guards"
	help
	  Enable Thread Stack Guards via MPU

if MPU_STACK_GUARD

config MPU_STACK_GUARD_MIN_SIZE_FLOAT
	int
	depends on FP_SHARING
	default 128
	help
	  Minimum size (and alignment when applicable) of an ARM MPU
	  region, which guards the stack of a thread that is using the
	  Floating Point (FP) context. The width of the guard is set to
	  128, to accommodate the length of a Cortex-M exception stack
	  frame when the floating point context is active. The FP context
	  is only stacked in sharing FP registers mode, therefore, the
	  option is applicable only when FP_SHARING is selected.

endif # MPU_STACK_GUARD

config MPU_ALLOW_FLASH_WRITE
	bool "Add MPU access to write to flash"
	help
	  Enable this to allow MPU RWX access to flash memory

endif # ARM_MPU

endif # CPU_HAS_MPU