| # Atmel SAM Ethernet (GMAC) driver configuration options |
| |
| # Copyright (c) 2016 Piotr Mienkowski |
| # SPDX-License-Identifier: Apache-2.0 |
| |
| menuconfig ETH_SAM_GMAC |
| bool "Atmel SAM Ethernet driver" |
| depends on SOC_FAMILY_SAM |
| select NOCACHE_MEMORY |
| help |
| Enable Atmel SAM MCU Family Ethernet driver. |
| |
| if ETH_SAM_GMAC |
| |
| config ETH_SAM_GMAC_NAME |
| string "Device name" |
| default "ETH_0" |
| help |
| Device name allows user to obtain a handle to the device object |
| required by all driver API functions. Device name has to be unique. |
| |
| config ETH_SAM_GMAC_QUEUES |
| int "Number of hardware TX and RX queues" |
| default 1 |
| range 1 3 |
| help |
| Select the number of hardware queues used by the driver. Packets will be |
| routed to appropriate queues based on their priority. |
| |
| config ETH_SAM_GMAC_FORCE_QUEUE |
| bool "Force all traffic to be routed through a specific queue" |
| depends on ETH_SAM_GMAC_QUEUES > 1 |
| depends on NET_TC_RX_COUNT < 5 |
| help |
| This option is meant to be used only for debugging. Use it to force all |
| traffic to be routed through a specific hardware queue. With this enabled |
| it is easier to verify whether the chosen hardware queue actually works. |
| This works only if there are four or fewer RX traffic classes enabled, as |
| the SAM GMAC hardware supports screening up to four traffic classes. |
| |
| config ETH_SAM_GMAC_FORCED_QUEUE |
| int "Queue to force the packets to" |
| depends on ETH_SAM_GMAC_FORCE_QUEUE |
| default 0 |
| range 0 1 if ETH_SAM_GMAC_QUEUES = 2 |
| range 0 2 if ETH_SAM_GMAC_QUEUES = 3 |
| help |
| Which queue to force the routing to. This affects both the TX and RX queues |
| setup. |
| |
| config ETH_SAM_GMAC_BUF_RX_COUNT |
| int "Network RX buffers preallocated by the SAM ETH driver" |
| default 12 |
| help |
| Number of network buffers that will be permanently allocated by the |
| Ethernet driver. These buffers are used in receive path. They are |
| preallocated by the driver and made available to the GMAC module to be |
| filled in with incoming data. Their number has to be large enough to fit |
| at least one complete Ethernet frame. SAM ETH driver will always allocate |
| that amount of buffers for itself thus reducing the NET_BUF_RX_COUNT |
| which is a total amount of RX data buffers used by the whole networking |
| stack. One has to ensure that NET_PKT_RX_COUNT is large enough to |
| fit at least two Ethernet frames: one being received by the GMAC module |
| and the other being processed by the higher layer networking stack. |
| |
| config ETH_SAM_GMAC_IRQ_PRI |
| int "Interrupt priority" |
| default 0 |
| help |
| IRQ priority of Ethernet device |
| |
| choice ETH_SAM_GMAC_MAC_SELECT |
| prompt "MAC address" |
| help |
| Choose how to configure MAC address. |
| |
| config ETH_SAM_GMAC_MAC_MANUAL |
| bool "Manual" |
| help |
| Assign an arbitrary MAC address. |
| |
| config ETH_SAM_GMAC_MAC_I2C_EEPROM |
| bool "Read from an I2C EEPROM" |
| help |
| Read MAC address from an I2C EEPROM. |
| |
| config ETH_SAM_GMAC_RANDOM_MAC |
| bool "Random MAC address" |
| help |
| Generate a random MAC address dynamically. |
| |
| endchoice |
| |
| if ETH_SAM_GMAC_MAC_MANUAL |
| |
| config ETH_SAM_GMAC_MAC0 |
| hex "MAC Address Byte 0" |
| default 0 |
| range 0 0xff |
| |
| config ETH_SAM_GMAC_MAC1 |
| hex "MAC Address Byte 1" |
| default 0 |
| range 0 0xff |
| |
| config ETH_SAM_GMAC_MAC2 |
| hex "MAC Address Byte 2" |
| default 0 |
| range 0 0xff |
| |
| config ETH_SAM_GMAC_MAC3 |
| hex "MAC Address Byte 3" |
| default 0 |
| range 0 0xff |
| |
| config ETH_SAM_GMAC_MAC4 |
| hex "MAC Address Byte 4" |
| default 0 |
| range 0 0xff |
| |
| config ETH_SAM_GMAC_MAC5 |
| hex "MAC Address Byte 5" |
| default 0 |
| range 0 0xff |
| |
| endif # ETH_SAM_GMAC_MAC_MANUAL |
| |
| if ETH_SAM_GMAC_MAC_I2C_EEPROM |
| |
| config ETH_SAM_GMAC_MAC_I2C_SLAVE_ADDRESS |
| hex "I2C 7-bit EEPROM chip address" |
| range 0 0xff |
| help |
| I2C 7-bit address of the EEPROM chip. |
| |
| config ETH_SAM_GMAC_MAC_I2C_INT_ADDRESS |
| hex "I2C EEPROM internal address" |
| range 0 0xffffffff |
| help |
| Internal address of the EEPROM chip where the MAC address is stored. |
| Chips with 1 to 4 byte internal address size are supported. Address |
| size has to be configured in a separate Kconfig option. |
| |
| config ETH_SAM_GMAC_MAC_I2C_INT_ADDRESS_SIZE |
| int "I2C EEPROM internal address size" |
| default 1 |
| range 1 4 |
| help |
| Size (in bytes) of the internal EEPROM address. |
| |
| config ETH_SAM_GMAC_MAC_I2C_DEV_NAME |
| string "I2C bus driver device name" |
| help |
| Device name, e.g. I2C_0, of an I2C bus driver device. It is required to |
| obtain handle to the I2C device object. |
| |
| endif # ETH_SAM_GMAC_MAC_I2C_EEPROM |
| |
| choice |
| prompt "MII/RMII Interface to the Physical Layer" |
| |
| config ETH_SAM_GMAC_RMII |
| bool "RMII" |
| |
| config ETH_SAM_GMAC_MII |
| bool "MII" |
| endchoice |
| |
| config ETH_SAM_GMAC_PHY_ADDR |
| int "GMAC PHY Address" |
| default 0 |
| help |
| GMAC PHY Address as used by IEEE 802.3, Section 2 MII compatible PHY |
| transceivers. If you have a single PHY on board it is safe to leave it |
| at 0 which is the broadcast address. |
| |
| config PTP_CLOCK_SAM_GMAC |
| bool "SAM GMAC PTP clock driver support" |
| default y |
| select PTP_CLOCK |
| depends on NET_GPTP |
| help |
| Enable SAM GMAC PTP Clock support. |
| |
| endif # ETH_SAM_GMAC |
