/* | |
* Copyright 2023 NXP | |
* | |
* SPDX-License-Identifier: Apache-2.0 | |
*/ | |
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_INPUTMUX_TRIGGER_PORTS_H_ | |
#define ZEPHYR_INCLUDE_DT_BINDINGS_INPUTMUX_TRIGGER_PORTS_H_ | |
#define LPC55S69_DMA0_OTRIG_BASE 0x16000000 | |
#define LPC55S69_DMA0_ITRIG_BASE 0x0E00000F | |
#define LPC55S69_DMA1_OTRIG_BASE 0x24000002 | |
#define LPC55S69_DMA1_ITRIG_BASE 0x20000008 | |
#endif |