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# Nordic Semiconductor nRF52 MCU line
# Copyright (c) 2016-2019 Nordic Semiconductor ASA
# SPDX-License-Identifier: Apache-2.0
config SOC_NRF52805
depends on SOC_SERIES_NRF52X
bool
config SOC_NRF52810
depends on SOC_SERIES_NRF52X
bool
config SOC_NRF52811
depends on SOC_SERIES_NRF52X
bool
config SOC_NRF52820
depends on SOC_SERIES_NRF52X
bool
config SOC_NRF52832
depends on SOC_SERIES_NRF52X
bool
select SOC_COMPATIBLE_NRF52832
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
config SOC_NRF52833
depends on SOC_SERIES_NRF52X
bool
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
config SOC_NRF52840
depends on SOC_SERIES_NRF52X
bool
select CPU_CORTEX_M_HAS_DWT
select CPU_HAS_FPU
choice
prompt "nRF52x MCU Selection"
depends on SOC_SERIES_NRF52X
config SOC_NRF52805_CAAA
bool "NRF52805_CAAA"
select SOC_NRF52805
config SOC_NRF52810_QFAA
bool "NRF52810_QFAA"
select SOC_NRF52810
config SOC_NRF52811_QFAA
bool "NRF52811_QFAA"
select SOC_NRF52811
config SOC_NRF52820_QDAA
bool "NRF52820_QDAA"
select SOC_NRF52820
config SOC_NRF52832_CIAA
bool "NRF52832_CIAA"
select SOC_NRF52832
config SOC_NRF52832_QFAA
bool "NRF52832_QFAA"
select SOC_NRF52832
config SOC_NRF52832_QFAB
bool "NRF52832_QFAB"
select SOC_NRF52832
config SOC_NRF52833_QIAA
bool "NRF52833_QIAA"
select SOC_NRF52833
config SOC_NRF52840_QIAA
bool "NRF52840_QIAA"
select SOC_NRF52840
endchoice
config SOC_DCDC_NRF52X
bool
help
Enable nRF52 series System on Chip DC/DC converter.
config SOC_DCDC_NRF52X_HV
bool
depends on SOC_NRF52840
help
Enable nRF52 series System on Chip High Voltage DC/DC converter.
config GPIO_AS_PINRESET
bool "GPIO as pin reset (reset button)"
depends on SOC_SERIES_NRF52X
default y
config NRF_ENABLE_ICACHE
bool "The instruction cache (I-Cache)"
depends on SOC_NRF52832 || SOC_NRF52833 || SOC_NRF52840
default y
config NRF52_ANOMALY_132_DELAY_US
int "Anomaly 132 workaround delay (microseconds)"
default 330
range 0 330
depends on NRF52_ANOMALY_132_WORKAROUND
help
Due to Anomaly 132 LF RC source may not start if restarted in certain
window after stopping (230 us to 330 us). Software reset also stops the
clock so if clock is initiated in certain window, the clock may also fail
to start at reboot. A delay is added before starting LF clock to ensure
that anomaly conditions are not met. Delay should be long enough to ensure
that clock is started later than 330 us after reset. If crystal oscillator
(XO) is used then low frequency clock initially starts with RC and then
seamlessly switches to XO which has much longer startup time thus,
depending on application, workaround may also need to be applied.
Additional drivers initialization increases initialization time and delay
may be shortened. Workaround is disabled by setting delay to 0.