| /* |
| * Copyright (c) 2022, NXP |
| * SPDX-License-Identifier: Apache-2.0 |
| * |
| * Note: File generated by imx_cfg_utils.py |
| * from mimxrt1060_evk.mex |
| */ |
| |
| #include <nxp/nxp_imx/rt/mimxrt1062dvl6a-pinctrl.dtsi> |
| |
| &pinctrl { |
| /* ADC1 inputs 0 and 15 */ |
| pinmux_adc1: pinmux_adc1 { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_b1_11_adc1_in0>, |
| <&iomuxc_gpio_ad_b1_10_adc1_in15>; |
| bias-disable; |
| drive-strength = "r0-6"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| /* conflicts with lpuart3 */ |
| pinmux_csi: pinmux_csi { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_b0_04_gpio1_io04>; |
| drive-strength = "r0-6"; |
| bias-pull-down; |
| bias-pull-down-value = "100k"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_ad_b1_04_csi_pixclk>, |
| <&iomuxc_gpio_ad_b1_05_csi_mclk>, |
| <&iomuxc_gpio_ad_b1_06_csi_vsync>, |
| <&iomuxc_gpio_ad_b1_07_csi_hsync>, |
| <&iomuxc_gpio_ad_b1_08_csi_data09>, |
| <&iomuxc_gpio_ad_b1_09_csi_data08>, |
| <&iomuxc_gpio_ad_b1_10_csi_data07>, |
| <&iomuxc_gpio_ad_b1_11_csi_data06>, |
| <&iomuxc_gpio_ad_b1_12_csi_data05>, |
| <&iomuxc_gpio_ad_b1_13_csi_data04>, |
| <&iomuxc_gpio_ad_b1_14_csi_data03>, |
| <&iomuxc_gpio_ad_b1_15_csi_data02>; |
| drive-strength = "r0-6"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| /* Note: USER_LED conflicts with ENET_RST */ |
| pinmux_enet: pinmux_enet { |
| group0 { |
| pinmux = <&iomuxc_gpio_b1_10_enet_ref_clk>; |
| bias-disable; |
| drive-strength = "r0-6"; |
| slew-rate = "fast"; |
| nxp,speed = "50-mhz"; |
| input-enable; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_ad_b0_10_gpio1_io10>, |
| <&iomuxc_gpio_ad_b0_09_gpio1_io09>; |
| drive-strength = "r0-5"; |
| bias-pull-up; |
| bias-pull-up-value = "100k"; |
| slew-rate = "fast"; |
| nxp,speed = "100-mhz"; |
| }; |
| group2 { |
| pinmux = <&iomuxc_gpio_b1_04_enet_rx_data0>, |
| <&iomuxc_gpio_b1_05_enet_rx_data1>, |
| <&iomuxc_gpio_b1_06_enet_rx_en>, |
| <&iomuxc_gpio_b1_07_enet_tx_data0>, |
| <&iomuxc_gpio_b1_08_enet_tx_data1>, |
| <&iomuxc_gpio_b1_09_enet_tx_en>, |
| <&iomuxc_gpio_b1_11_enet_rx_er>, |
| <&iomuxc_gpio_emc_40_enet_mdc>, |
| <&iomuxc_gpio_emc_41_enet_mdio>; |
| drive-strength = "r0-5"; |
| bias-pull-up; |
| bias-pull-up-value = "100k"; |
| slew-rate = "fast"; |
| nxp,speed = "200-mhz"; |
| }; |
| }; |
| |
| pinmux_flexcan3: pinmux_flexcan3 { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_b0_14_flexcan3_tx>, |
| <&iomuxc_gpio_ad_b0_15_flexcan3_rx>; |
| drive-strength = "r0-6"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| /* flexpwm output for board LED */ |
| pinmux_flexpwm2: pinmux_flexpwm2 { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_b0_09_flexpwm2_pwma3>; |
| drive-strength = "r0-4"; |
| bias-pull-up; |
| bias-pull-up-value = "47k"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| pinmux_flexspi1: pinmux_flexspi1 { |
| group0 { |
| pinmux = <&iomuxc_gpio_sd_b1_05_flexspi_a_dqs>; |
| drive-strength = "r0-6"; |
| input-schmitt-enable; |
| bias-pull-down; |
| bias-pull-down-value = "100k"; |
| slew-rate = "fast"; |
| nxp,speed = "200-mhz"; |
| input-enable; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_sd_b1_03_flexspi_b_data0>, |
| <&iomuxc_gpio_sd_b1_00_flexspi_b_data3>, |
| <&iomuxc_gpio_sd_b1_01_flexspi_b_data2>, |
| <&iomuxc_gpio_sd_b1_02_flexspi_b_data1>, |
| <&iomuxc_gpio_sd_b1_04_flexspi_b_sclk>, |
| <&iomuxc_gpio_sd_b1_06_flexspi_a_ss0_b>, |
| <&iomuxc_gpio_sd_b1_07_flexspi_a_sclk>, |
| <&iomuxc_gpio_sd_b1_08_flexspi_a_data0>, |
| <&iomuxc_gpio_sd_b1_09_flexspi_a_data1>, |
| <&iomuxc_gpio_sd_b1_10_flexspi_a_data2>, |
| <&iomuxc_gpio_sd_b1_11_flexspi_a_data3>; |
| drive-strength = "r0-6"; |
| slew-rate = "fast"; |
| nxp,speed = "200-mhz"; |
| input-enable; |
| }; |
| }; |
| |
| /* Configures pin routing and optionally pin electrical features. */ |
| pinmux_lcdif: pinmux_lcdif { |
| group0 { |
| pinmux = <&iomuxc_gpio_b0_00_lcdif_clk>, |
| <&iomuxc_gpio_b0_01_lcdif_enable>, |
| <&iomuxc_gpio_b0_02_lcdif_hsync>, |
| <&iomuxc_gpio_b0_03_lcdif_vsync>, |
| <&iomuxc_gpio_b0_04_lcdif_data00>, |
| <&iomuxc_gpio_b0_05_lcdif_data01>, |
| <&iomuxc_gpio_b0_06_lcdif_data02>, |
| <&iomuxc_gpio_b0_07_lcdif_data03>, |
| <&iomuxc_gpio_b0_08_lcdif_data04>, |
| <&iomuxc_gpio_b0_09_lcdif_data05>, |
| <&iomuxc_gpio_b0_10_lcdif_data06>, |
| <&iomuxc_gpio_b0_11_lcdif_data07>, |
| <&iomuxc_gpio_b0_12_lcdif_data08>, |
| <&iomuxc_gpio_b0_13_lcdif_data09>, |
| <&iomuxc_gpio_b0_14_lcdif_data10>, |
| <&iomuxc_gpio_b0_15_lcdif_data11>, |
| <&iomuxc_gpio_b1_00_lcdif_data12>, |
| <&iomuxc_gpio_b1_01_lcdif_data13>, |
| <&iomuxc_gpio_b1_02_lcdif_data14>, |
| <&iomuxc_gpio_b1_03_lcdif_data15>; |
| drive-strength = "r0-6"; |
| input-schmitt-enable; |
| bias-pull-up; |
| bias-pull-up-value = "100k"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_ad_b0_02_gpio1_io02>, |
| <&iomuxc_gpio_b1_15_gpio2_io31>; |
| drive-strength = "r0-6"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| pinmux_lpi2c1: pinmux_lpi2c1 { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_b1_01_lpi2c1_sda>, |
| <&iomuxc_gpio_ad_b1_00_lpi2c1_scl>; |
| drive-strength = "r0-6"; |
| drive-open-drain; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| input-enable; |
| }; |
| }; |
| |
| /* Conflicts with USDHC pins. Connect R278, R279, R280, and R281 on evk board */ |
| pinmux_lpspi1: pinmux_lpspi1 { |
| group0 { |
| pinmux = <&iomuxc_gpio_sd_b0_01_lpspi1_pcs0>, |
| <&iomuxc_gpio_sd_b0_00_lpspi1_sck>, |
| <&iomuxc_gpio_sd_b0_03_lpspi1_sdi>, |
| <&iomuxc_gpio_sd_b0_02_lpspi1_sdo>; |
| drive-strength = "r0-6"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| /* conflicts with lcdif pins */ |
| pinmux_lpspi3: pinmux_lpspi3 { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_b0_03_lpspi3_pcs0>, |
| <&iomuxc_gpio_ad_b0_00_lpspi3_sck>, |
| <&iomuxc_gpio_ad_b0_02_lpspi3_sdi>, |
| <&iomuxc_gpio_ad_b0_01_lpspi3_sdo>; |
| drive-strength = "r0-6"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| pinmux_lpuart1: pinmux_lpuart1 { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_b0_13_lpuart1_rx>, |
| <&iomuxc_gpio_ad_b0_12_lpuart1_tx>; |
| drive-strength = "r0-6"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| pinmux_lpuart1_sleep: pinmux_lpuart1_sleep { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_b0_13_gpio1_io13>; |
| drive-strength = "r0"; |
| bias-pull-up; |
| bias-pull-up-value = "100k"; |
| slew-rate = "slow"; |
| nxp,speed = "50-mhz"; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_ad_b0_12_lpuart1_tx>; |
| drive-strength = "r0-6"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| pinmux_lpuart3: pinmux_lpuart3 { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>, |
| <&iomuxc_gpio_ad_b1_07_lpuart3_rx>; |
| drive-strength = "r0-6"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| /* Flow control for lpuart3 */ |
| pinmux_lpuart3_flow_control: pinmux_lpuart3_flow_control { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_b1_06_lpuart3_tx>, |
| <&iomuxc_gpio_ad_b1_07_lpuart3_rx>, |
| <&iomuxc_gpio_ad_b1_04_lpuart3_cts_b>, |
| <&iomuxc_gpio_ad_b1_05_lpuart3_rts_b>; |
| drive-strength = "r0-6"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| pinmux_lpuart3_sleep: pinmux_lpuart3_sleep { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_b1_06_gpio1_io22>; |
| drive-strength = "r0"; |
| bias-pull-up; |
| bias-pull-up-value = "100k"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_ad_b1_07_lpuart3_rx>; |
| drive-strength = "r0-6"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| pinmux_ptp: pinmux_ptp { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_b1_02_enet_1588_event2_out>, |
| <&iomuxc_gpio_ad_b1_03_enet_1588_event2_in>; |
| drive-strength = "r0-6"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| pinmux_sai1: pinmux_sai1 { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_b1_09_sai1_mclk>, |
| <&iomuxc_gpio_ad_b1_13_sai1_tx_data0>, |
| <&iomuxc_gpio_ad_b1_12_sai1_rx_data0>, |
| <&iomuxc_gpio_ad_b1_14_sai1_tx_bclk>, |
| <&iomuxc_gpio_ad_b1_15_sai1_tx_sync>; |
| drive-strength = "r0-6"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| /* Note SWO is configured with a cpu frequency of 132MHz and SWO frequency of 7500KHz */ |
| pinmux_swo: pinmux_swo { |
| group0 { |
| pinmux = <&iomuxc_gpio_ad_b0_10_arm_trace_swo>; |
| bias-disable; |
| drive-strength = "r0-7"; |
| slew-rate = "fast"; |
| nxp,speed = "200-mhz"; |
| }; |
| }; |
| |
| pinmux_usdhc1: pinmux_usdhc1 { |
| group0 { |
| pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>; |
| bias-disable; |
| drive-strength = "r0"; |
| input-schmitt-enable; |
| slew-rate = "fast"; |
| nxp,speed = "100-mhz"; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_b1_12_gpio2_io28>, |
| <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>, |
| <&iomuxc_gpio_sd_b0_02_usdhc1_data0>, |
| <&iomuxc_gpio_sd_b0_03_usdhc1_data1>, |
| <&iomuxc_gpio_sd_b0_04_usdhc1_data2>, |
| <&iomuxc_gpio_sd_b0_05_usdhc1_data3>; |
| drive-strength = "r0"; |
| input-schmitt-enable; |
| bias-pull-up; |
| bias-pull-up-value = "47k"; |
| slew-rate = "fast"; |
| nxp,speed = "100-mhz"; |
| }; |
| group2 { |
| pinmux = <&iomuxc_gpio_b1_14_usdhc1_vselect>; |
| drive-strength = "r0-4"; |
| input-schmitt-enable; |
| bias-pull-up; |
| bias-pull-up-value = "47k"; |
| slew-rate = "fast"; |
| nxp,speed = "100-mhz"; |
| }; |
| group3 { |
| pinmux = <&iomuxc_gpio_ad_b0_05_gpio1_io05>; |
| drive-strength = "r0-6"; |
| slew-rate = "slow"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| /* fast pinmux settings for USDHC (over 100 Mhz) */ |
| pinmux_usdhc1_fast: pinmux_usdhc1_fast { |
| group0 { |
| pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>; |
| bias-disable; |
| drive-strength = "r0-7"; |
| input-schmitt-enable; |
| slew-rate = "fast"; |
| nxp,speed = "200-mhz"; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>, |
| <&iomuxc_gpio_sd_b0_02_usdhc1_data0>, |
| <&iomuxc_gpio_sd_b0_03_usdhc1_data1>, |
| <&iomuxc_gpio_sd_b0_04_usdhc1_data2>, |
| <&iomuxc_gpio_sd_b0_05_usdhc1_data3>; |
| drive-strength = "r0-7"; |
| input-schmitt-enable; |
| bias-pull-up; |
| bias-pull-up-value = "47k"; |
| slew-rate = "fast"; |
| nxp,speed = "200-mhz"; |
| }; |
| }; |
| |
| /* medium pinmux settings for USDHC (under 100 Mhz) */ |
| pinmux_usdhc1_med: pinmux_usdhc1_med { |
| group0 { |
| pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>; |
| bias-disable; |
| drive-strength = "r0-7"; |
| input-schmitt-enable; |
| slew-rate = "fast"; |
| nxp,speed = "100-mhz"; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>, |
| <&iomuxc_gpio_sd_b0_02_usdhc1_data0>, |
| <&iomuxc_gpio_sd_b0_03_usdhc1_data1>, |
| <&iomuxc_gpio_sd_b0_04_usdhc1_data2>, |
| <&iomuxc_gpio_sd_b0_05_usdhc1_data3>; |
| drive-strength = "r0-7"; |
| input-schmitt-enable; |
| bias-pull-up; |
| bias-pull-up-value = "47k"; |
| slew-rate = "fast"; |
| nxp,speed = "100-mhz"; |
| }; |
| }; |
| |
| /* slow pinmux settings for USDHC (under 50 Mhz) */ |
| pinmux_usdhc1_slow: pinmux_usdhc1_slow { |
| group0 { |
| pinmux = <&iomuxc_gpio_sd_b0_01_usdhc1_clk>; |
| bias-disable; |
| drive-strength = "r0-7"; |
| input-schmitt-enable; |
| slew-rate = "fast"; |
| nxp,speed = "50-mhz"; |
| }; |
| group1 { |
| pinmux = <&iomuxc_gpio_sd_b0_00_usdhc1_cmd>, |
| <&iomuxc_gpio_sd_b0_02_usdhc1_data0>, |
| <&iomuxc_gpio_sd_b0_03_usdhc1_data1>, |
| <&iomuxc_gpio_sd_b0_04_usdhc1_data2>, |
| <&iomuxc_gpio_sd_b0_05_usdhc1_data3>; |
| drive-strength = "r0-7"; |
| input-schmitt-enable; |
| bias-pull-up; |
| bias-pull-up-value = "47k"; |
| slew-rate = "fast"; |
| nxp,speed = "50-mhz"; |
| }; |
| }; |
| }; |