blob: aafdacb1855dc76bdb46d0cb64ebcabde20182d3 [file] [log] [blame]
#define CONFIG_FXOS8700_NAME NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_LABEL
#define CONFIG_FXOS8700_I2C_NAME NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_BUS_NAME
#define CONFIG_FXOS8700_I2C_ADDRESS NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_BASE_ADDRESS
#define CONFIG_FXOS8700_GPIO_NAME NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_INT2_GPIOS_CONTROLLER
#define CONFIG_FXOS8700_GPIO_PIN NXP_KINETIS_I2C_40066000_NXP_FXOS8700_1D_INT2_GPIOS_PIN
#define CONFIG_IEEE802154_MCR20A_SPI_DRV_NAME NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_BUS_NAME
#define CONFIG_IEEE802154_MCR20A_SPI_SLAVE NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_BASE_ADDRESS
#define CONFIG_IEEE802154_MCR20A_SPI_FREQ NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_SPI_MAX_FREQUENCY
#define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_DRV_NAME NXP_KINETIS_DSPI_4002C000_CS_GPIOS_CONTROLLER
#define CONFIG_IEEE802154_MCR20A_GPIO_SPI_CS_PIN NXP_KINETIS_DSPI_4002C000_CS_GPIOS_PIN
#define CONFIG_MCR20A_GPIO_IRQ_B_NAME NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_IRQB_GPIOS_CONTROLLER
#define CONFIG_MCR20A_GPIO_IRQ_B_PIN NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_IRQB_GPIOS_PIN
#define CONFIG_MCR20A_GPIO_RESET_NAME NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_RESET_GPIOS_CONTROLLER
#define CONFIG_MCR20A_GPIO_RESET_PIN NXP_KINETIS_DSPI_4002C000_NXP_MCR20A_0_RESET_GPIOS_PIN
#define CONFIG_WNCM14A2A_UART_DRV_NAME NXP_KINETIS_UART_4006C000_WNCM14A2A_BUS_NAME
#define CONFIG_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_NAME NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_BOOT_MODE_SEL_PIN NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_BOOT_MODE_SEL_GPIOS_PIN
#define CONFIG_WNCM14A2A_GPIO_MDM_POWER_NAME NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_POWER_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_POWER_PIN NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_POWER_GPIOS_PIN
#define CONFIG_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_NAME NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_KEEP_AWAKE_PIN NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_KEEP_AWAKE_GPIOS_PIN
#define CONFIG_WNCM14A2A_GPIO_MDM_RESET_NAME NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_RESET_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_RESET_PIN NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_RESET_GPIOS_PIN
#define CONFIG_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_NAME NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_SHLD_TRANS_ENA_PIN NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SHLD_TRANS_ENA_GPIOS_PIN
#ifdef NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
#define CONFIG_WNCM14A2A_GPIO_MDM_SEND_OK_NAME NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_CONTROLLER
#define CONFIG_WNCM14A2A_GPIO_MDM_SEND_OK_PIN NXP_KINETIS_UART_4006C000_WNCM14A2A_MDM_SEND_OK_GPIOS_PIN
#endif