| /* |
| * Copyright (c) 2022 Nordic Semiconductor |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| &pinctrl { |
| uart0_default: uart0_default { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 1, 3)>, |
| <NRF_PSEL(UART_RX, 1, 10)>; |
| }; |
| }; |
| |
| uart0_sleep: uart0_sleep { |
| group1 { |
| psels = <NRF_PSEL(UART_TX, 1, 3)>, |
| <NRF_PSEL(UART_RX, 1, 10)>; |
| low-power-enable; |
| }; |
| }; |
| |
| i2c0_default: i2c0_default { |
| group1 { |
| psels = <NRF_PSEL(TWIM_SDA, 0, 31)>, |
| <NRF_PSEL(TWIM_SCL, 0, 2)>; |
| }; |
| }; |
| |
| i2c0_sleep: i2c0_sleep { |
| group1 { |
| psels = <NRF_PSEL(TWIM_SDA, 0, 31)>, |
| <NRF_PSEL(TWIM_SCL, 0, 2)>; |
| low-power-enable; |
| }; |
| }; |
| |
| i2c1_default: i2c1_default { |
| group1 { |
| psels = <NRF_PSEL(TWIM_SDA, 0, 14)>, |
| <NRF_PSEL(TWIM_SCL, 0, 15)>; |
| }; |
| }; |
| |
| i2c1_sleep: i2c1_sleep { |
| group1 { |
| psels = <NRF_PSEL(TWIM_SDA, 0, 14)>, |
| <NRF_PSEL(TWIM_SCL, 0, 15)>; |
| low-power-enable; |
| }; |
| }; |
| |
| spi2_default: spi2_default { |
| group1 { |
| psels = <NRF_PSEL(SPIM_SCK, 0, 13)>, |
| <NRF_PSEL(SPIM_MOSI, 1, 1)>, |
| <NRF_PSEL(SPIM_MISO, 1, 8)>; |
| }; |
| }; |
| |
| spi2_sleep: spi2_sleep { |
| group1 { |
| psels = <NRF_PSEL(SPIM_SCK, 0, 13)>, |
| <NRF_PSEL(SPIM_MOSI, 1, 1)>, |
| <NRF_PSEL(SPIM_MISO, 1, 8)>; |
| low-power-enable; |
| }; |
| }; |
| |
| pwm0_default: pwm0_default { |
| group1 { |
| psels = <NRF_PSEL(PWM_OUT0, 0, 24)>, |
| <NRF_PSEL(PWM_OUT1, 0, 16)>, |
| <NRF_PSEL(PWM_OUT2, 0, 6)>; |
| nordic,invert; |
| }; |
| }; |
| |
| pwm0_sleep: pwm0_sleep { |
| group1 { |
| psels = <NRF_PSEL(PWM_OUT0, 0, 24)>, |
| <NRF_PSEL(PWM_OUT1, 0, 16)>, |
| <NRF_PSEL(PWM_OUT2, 0, 6)>; |
| low-power-enable; |
| }; |
| }; |
| |
| pwm1_default: pwm1_default { |
| group1 { |
| psels = <NRF_PSEL(PWM_OUT0, 1, 9)>; |
| }; |
| }; |
| |
| pwm1_sleep: pwm1_sleep { |
| group1 { |
| psels = <NRF_PSEL(PWM_OUT0, 1, 9)>; |
| }; |
| }; |
| |
| pdm0_default: pdm0_default { |
| group1 { |
| psels = <NRF_PSEL(PDM_CLK, 0, 26)>, |
| <NRF_PSEL(PDM_DIN, 0, 25)>; |
| }; |
| }; |
| |
| pdm0_sleep: pdm0_sleep { |
| group1 { |
| psels = <NRF_PSEL(PDM_CLK, 0, 26)>, |
| <NRF_PSEL(PDM_DIN, 0, 25)>; |
| low-power-enable; |
| }; |
| }; |
| |
| pwm2_default: pwm2_default { |
| group1 { |
| psels = <NRF_PSEL(PWM_OUT0, 0, 13)>; |
| }; |
| }; |
| |
| pwm2_sleep: pwm2_sleep { |
| group1 { |
| psels = <NRF_PSEL(PWM_OUT0, 0, 13)>; |
| low-power-enable; |
| }; |
| }; |
| }; |