blob: 6d65f64d18d99798cc38b4a31f83575f7fb53db1 [file] [log] [blame]
/*
* Copyright (c) 2016 Open-RnD Sp. z o.o.
*
* SPDX-License-Identifier: Apache-2.0
*/
/**
* @file
* @brief System/hardware module for STM32F1 processor
*/
#include <zephyr/device.h>
#include <zephyr/init.h>
#include <stm32_ll_system.h>
#include <cmsis_core.h>
/**
* @brief Perform basic hardware initialization at boot.
*
* This needs to be run from the very beginning.
* So the init priority has to be 0 (zero).
*
* @return 0
*/
static int stm32f1_init(void)
{
#ifdef FLASH_ACR_PRFTBE
/* Enable ART Accelerator prefetch */
LL_FLASH_EnablePrefetch();
#endif
/* Update CMSIS SystemCoreClock variable (HCLK) */
/* At reset, system core clock is set to 8 MHz from HSI */
SystemCoreClock = 8000000;
return 0;
}
SYS_INIT(stm32f1_init, PRE_KERNEL_1, 0);