blob: ff7f65b107ce7b3ea9880614398298fe9b998fa0 [file] [log] [blame]
# Copyright (c) 2017, I-SENSE group of ICCS
# SPDX-License-Identifier: Apache-2.0
description: STM32 USB controller
compatible: "st,stm32-usb"
include: usb-ep.yaml
properties:
reg:
required: true
interrupts:
required: true
ram-size:
type: int
required: true
description: Size of USB dedicated RAM. STM32 SOC's reference
manual defines USB packet SRAM size.
disconnect-gpios:
type: phandle-array
required: false
description: Some boards use a USB DISCONNECT pin to enable
the pull-up resistor on USB Data Positive signal.
phys:
type: phandle
required: false
description: PHY provider specifier
enable-pin-remap:
type: boolean
required: false
description: For STM32F0 series SoCs on QFN28 and TSSOP20 packages
enable PIN pair PA11/12 mapped instead of PA9/10 (e.g. stm32f070x6)
clocks:
required: true
pinctrl-0:
type: phandles
required: false
description: |
Pin configuration for USB signals (DM/DP/NOE).
We expect that the phandles will reference pinctrl nodes.
For example:
<&usb_dm_pa11 &usb_dp_pa12>;