dts/arm/st/wb/stm32wb55Xg.dtsi

/*
 * Copyright (c) 2018 Linaro Limited
 *
 * SPDX-License-Identifier: Apache-2.0
 */
#include <mem.h>
#include <st/wb/stm32wb55.dtsi>

/ {
	sram0: memory@20000000 {
		reg = <0x20000000 DT_SIZE_K(96)>;
	};

	sram2a:memory@20030000 {
		reg = <0x20030000 0x2800>;
	};

	sram2b:memory@20038000 {
		reg = <0x20038000 0x5000>;
	};


	soc {
		flash-controller@58004000 {
			flash0: flash@8000000 {
				reg = <0x08000000 DT_SIZE_K(1024)>;
			};
		};
	};
};