blob: 8fe433b808a4d5663209e171c9b10b546452a8a7 [file] [log] [blame]
/*
* Copyright (c) Bobby Noelte
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <st/f0/stm32f0.dtsi>
/ {
soc {
clocks {
clk_hsi48: clk-hsi48 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <DT_FREQ_M(48)>;
status = "disabled";
};
};
flash-controller@40022000 {
flash0: flash@8000000 {
erase-block-size = <2048>;
};
};
timers2: timers@40000000 {
compatible = "st,stm32-timers";
reg = <0x40000000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000001>;
interrupts = <15 0>;
interrupt-names = "global";
st,prescaler = <0>;
status = "disabled";
pwm {
compatible = "st,stm32-pwm";
status = "disabled";
#pwm-cells = <3>;
};
};
spi2: spi@40003800 {
compatible = "st,stm32-spi-fifo", "st,stm32-spi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x40003800 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
interrupts = <26 3>;
status = "disabled";
};
pinctrl: pin-controller@48000000 {
gpioe: gpio@48001000 {
compatible = "st,stm32-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48001000 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00200000>;
};
};
dac1: dac@40007400 {
compatible = "st,stm32-dac";
reg = <0x40007400 0x400>;
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x20000000>;
status = "disabled";
#io-channel-cells = <1>;
};
dma1: dma@40020000 {
interrupts = <9 0 10 0 10 0 11 0 11 0 11 0 11 0>;
};
dma2: dma@40020400 {
compatible = "st,stm32-dma-v2bis";
#dma-cells = <2>;
reg = <0x40020400 0x400>;
interrupts = <10 0 10 0 11 0 11 0 11 0>;
clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x2>;
status = "disabled";
};
};
};