| /* |
| * Copyright (c) 2017 Florian Vaussard, HEIG-VD |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <st/f4/stm32f411.dtsi> |
| |
| / { |
| chosen { |
| zephyr,entropy = &rng; |
| }; |
| |
| soc { |
| pinctrl: pin-controller@40020000 { |
| reg = <0x40020000 0x1c00>; |
| |
| gpiof: gpio@40021400 { |
| compatible = "st,stm32-gpio"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| reg = <0x40021400 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000020>; |
| }; |
| |
| gpiog: gpio@40021800 { |
| compatible = "st,stm32-gpio"; |
| gpio-controller; |
| #gpio-cells = <2>; |
| reg = <0x40021800 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_AHB1 0x00000040>; |
| }; |
| }; |
| |
| usart3: serial@40004800 { |
| compatible = "st,stm32-usart", "st,stm32-uart"; |
| reg = <0x40004800 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00040000>; |
| interrupts = <39 0>; |
| status = "disabled"; |
| }; |
| |
| timers6: timers@40001000 { |
| compatible = "st,stm32-timers"; |
| reg = <0x40001000 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000010>; |
| interrupts = <54 0>; |
| interrupt-names = "global"; |
| st,prescaler = <0>; |
| status = "disabled"; |
| |
| counter { |
| compatible = "st,stm32-counter"; |
| status = "disabled"; |
| }; |
| }; |
| |
| timers7: timers@40001400 { |
| compatible = "st,stm32-timers"; |
| reg = <0x40001400 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000020>; |
| interrupts = <55 0>; |
| interrupt-names = "global"; |
| st,prescaler = <0>; |
| status = "disabled"; |
| |
| counter { |
| compatible = "st,stm32-counter"; |
| status = "disabled"; |
| }; |
| }; |
| |
| timers8: timers@40010400 { |
| compatible = "st,stm32-timers"; |
| reg = <0x40010400 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000002>; |
| interrupts = <43 0>, <44 0>, <45 0>, <46 0>; |
| interrupt-names = "brk", "up", "trgcom", "cc"; |
| st,prescaler = <0>; |
| status = "disabled"; |
| |
| pwm { |
| compatible = "st,stm32-pwm"; |
| status = "disabled"; |
| #pwm-cells = <3>; |
| }; |
| |
| qdec { |
| compatible = "st,stm32-qdec"; |
| status = "disabled"; |
| st,input-filter-level = <NO_FILTER>; |
| }; |
| }; |
| |
| timers12: timers@40001800 { |
| compatible = "st,stm32-timers"; |
| reg = <0x40001800 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000040>; |
| interrupts = <43 0>; |
| interrupt-names = "global"; |
| st,prescaler = <0>; |
| status = "disabled"; |
| |
| pwm { |
| compatible = "st,stm32-pwm"; |
| status = "disabled"; |
| #pwm-cells = <3>; |
| }; |
| |
| counter { |
| compatible = "st,stm32-counter"; |
| status = "disabled"; |
| }; |
| }; |
| |
| timers13: timers@40001c00 { |
| compatible = "st,stm32-timers"; |
| reg = <0x40001c00 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000080>; |
| interrupts = <44 0>; |
| interrupt-names = "global"; |
| st,prescaler = <0>; |
| status = "disabled"; |
| |
| pwm { |
| compatible = "st,stm32-pwm"; |
| status = "disabled"; |
| #pwm-cells = <3>; |
| }; |
| |
| counter { |
| compatible = "st,stm32-counter"; |
| status = "disabled"; |
| }; |
| }; |
| |
| timers14: timers@40002000 { |
| compatible = "st,stm32-timers"; |
| reg = <0x40002000 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00000100>; |
| interrupts = <45 0>; |
| interrupt-names = "global"; |
| st,prescaler = <0>; |
| status = "disabled"; |
| |
| pwm { |
| compatible = "st,stm32-pwm"; |
| status = "disabled"; |
| #pwm-cells = <3>; |
| }; |
| |
| counter { |
| compatible = "st,stm32-counter"; |
| status = "disabled"; |
| }; |
| }; |
| |
| rng: rng@50060800 { |
| compatible = "st,stm32-rng"; |
| reg = <0x50060800 0x400>; |
| interrupts = <80 0>; |
| clocks = <&rcc STM32_CLOCK_BUS_AHB2 0x00000040>; |
| status = "disabled"; |
| }; |
| |
| usbotg_fs: usb@50000000 { |
| num-bidir-endpoints = <6>; |
| }; |
| |
| quadspi: quadspi@a0001000 { |
| compatible = "st,stm32-qspi"; |
| #address-cells = <0x1>; |
| #size-cells = <0x0>; |
| reg = <0xa0001000 0x400>; |
| interrupts = <92 0>; |
| clocks = <&rcc STM32_CLOCK_BUS_AHB3 0x00000002>; |
| status = "disabled"; |
| }; |
| }; |
| }; |
