| /* |
| * Copyright (c) 2017 Florian Vaussard, HEIG-VD |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <st/f4/stm32f412.dtsi> |
| |
| / { |
| soc { |
| uart4: serial@40004c00 { |
| compatible ="st,stm32-uart"; |
| reg = <0x40004c00 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00080000>; |
| interrupts = <52 0>; |
| status = "disabled"; |
| }; |
| |
| uart5: serial@40005000 { |
| compatible = "st,stm32-uart"; |
| reg = <0x40005000 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00100000>; |
| interrupts = <53 0>; |
| status = "disabled"; |
| }; |
| |
| uart7: serial@40007800 { |
| compatible = "st,stm32-uart"; |
| reg = <0x40007800 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB1 0x40000000>; |
| interrupts = <82 0>; |
| status = "disabled"; |
| }; |
| |
| uart8: serial@40007c00 { |
| compatible = "st,stm32-uart"; |
| reg = <0x40007c00 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>; |
| interrupts = <83 0>; |
| status = "disabled"; |
| }; |
| |
| uart9: serial@40011800 { |
| compatible = "st,stm32-uart"; |
| reg = <0x40011800 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000040>; |
| interrupts = <88 0>; |
| status = "disabled"; |
| }; |
| |
| uart10: serial@40011c00 { |
| compatible = "st,stm32-uart"; |
| reg = <0x40011c00 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00000080>; |
| interrupts = <89 0>; |
| status = "disabled"; |
| }; |
| |
| dac1: dac@40007400 { |
| compatible = "st,stm32-dac"; |
| reg = <0x40007400 0x400>; |
| clocks = <&rcc STM32_CLOCK_BUS_APB1 0x20000000>; |
| status = "disabled"; |
| #io-channel-cells = <1>; |
| }; |
| }; |
| }; |
