| .. _nucleo_l432kc_board: |
| |
| ST Nucleo L432KC |
| ################ |
| |
| Overview |
| ******** |
| |
| The Nucleo L432KC board features an ARM Cortex-M4 based STM32L432KC MCU |
| with a wide range of connectivity support and configurations. Here are |
| some highlights of the Nucleo L432KC board: |
| |
| - STM32 microcontroller in UFQFPN32 package |
| - Arduino Uno V3 connectivity |
| - On-board ST-LINK/V2-1 debugger/programmer with SWD connector |
| - Flexible board power supply: |
| |
| - USB VBUS or external source(3.3V, 5V, 7 - 12V) |
| - Power management access point |
| |
| - Three LEDs: USB communication (LD1), user LED (LD2), power LED (LD3) |
| - One push-button: RESET |
| |
| .. image:: img/nucleo32_ulp_logo.jpg |
| :width: 250px |
| :align: center |
| :height: 188px |
| :alt: Nucleo L432KC |
| |
| More information about the board can be found at the `Nucleo L432KC website`_. |
| |
| Hardware |
| ******** |
| |
| The STM32L432KC SoC provides the following hardware IPs: |
| |
| - Ultra-low-power with FlexPowerControl (down to 28 nA Standby mode and 84 |
| |micro| A/MHz run mode) |
| - Core: ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU, frequency up to 80 MHz, |
| 100DMIPS/1.25DMIPS/MHz (Dhrystone 2.1) |
| - Clock Sources: |
| |
| - 32 kHz crystal oscillator for RTC (LSE) |
| - Internal 16 MHz factory-trimmed RC ( |plusminus| 1%) |
| - Internal low-power 32 kHz RC ( |plusminus| 5%) |
| - Internal multispeed 100 kHz to 48 MHz oscillator, auto-trimmed by |
| LSE (better than |plusminus| 0.25 % accuracy) |
| - 2 PLLs for system clock, USB, audio, ADC |
| |
| - RTC with HW calendar, alarms and calibration |
| - Up to 3 capacitive sensing channels: support touchkey, linear and rotary touch sensors |
| - 11x timers: |
| |
| - 1x 16-bit advanced motor-control |
| - 1x 32-bit and 2x 16-bit general purpose |
| - 2x 16-bit basic |
| - 2x low-power 16-bit timers (available in Stop mode) |
| - 2x watchdogs |
| - SysTick timer |
| |
| - Up to 26 fast I/Os, most 5 V-tolerant |
| - Memories |
| |
| - Up to 256 KB single bank Flash, proprietary code readout protection |
| - Up to 64 KB of SRAM including 16 KB with hardware parity check |
| - Quad SPI memory interface |
| |
| - Rich analog peripherals (independent supply) |
| |
| - 1x 12-bit ADC 5 MSPS, up to 16-bit with hardware oversampling, 200 |
| |micro| A/MSPS |
| - 2x 12-bit DAC, low-power sample and hold |
| - 1x operational amplifiers with built-in PGA |
| - 2x ultra-low-power comparators |
| |
| - 13x communication interfaces |
| |
| - USB OTG 2.0 full-speed crystal less solution with LPM and BCD |
| - 1x SAIs (serial audio interface) |
| - 2x I2C FM+(1 Mbit/s), SMBus/PMBus |
| - 3x USARTs (ISO 7816, LIN, IrDA, modem) |
| - 2x SPIs (3x SPIs with the Quad SPI) |
| - CAN (2.0B Active) |
| - SWPMI single wire protocol master I/F |
| - IRTIM (Infrared interface) |
| |
| - 14-channel DMA controller |
| - True random number generator |
| - CRC calculation unit, 96-bit unique ID |
| - Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell* |
| |
| |
| More information about STM32L432KC can be found here: |
| - `STM32L432KC on www.st.com`_ |
| - `STM32L432 reference manual`_ |
| |
| Supported Features |
| ================== |
| |
| The Zephyr nucleo_l432kc board configuration supports the following hardware features: |
| |
| +-----------+------------+-------------------------------------+ |
| | Interface | Controller | Driver/Component | |
| +===========+============+=====================================+ |
| | NVIC | on-chip | nested vector interrupt controller | |
| +-----------+------------+-------------------------------------+ |
| | UART | on-chip | serial port-polling; | |
| | | | serial port-interrupt | |
| +-----------+------------+-------------------------------------+ |
| | PINMUX | on-chip | pinmux | |
| +-----------+------------+-------------------------------------+ |
| | GPIO | on-chip | gpio | |
| +-----------+------------+-------------------------------------+ |
| | I2C | on-chip | i2c | |
| +-----------+------------+-------------------------------------+ |
| | PWM | on-chip | pwm | |
| +-----------+------------+-------------------------------------+ |
| |
| Other hardware features are not yet supported on this Zephyr port. |
| |
| The default configuration can be found in the defconfig file: |
| |
| ``boards/arm/nucleo_l432kc/nucleo_l432kc_defconfig`` |
| |
| |
| Connections and IOs |
| =================== |
| |
| Nucleo L432KC Board has 6 GPIO controllers. These controllers are responsible for pin muxing, |
| input/output, pull-up, etc. |
| |
| Available pins: |
| --------------- |
| .. image:: img/nucleo_l432kc_arduino_nano.png |
| :width: 960px |
| :align: center |
| :height: 720px |
| :alt: Nucleo L432KC Arduino connectors |
| |
| For mode details please refer to `STM32 Nucleo-32 board User Manual`_. |
| |
| Default Zephyr Peripheral Mapping: |
| ---------------------------------- |
| |
| - UART_1_TX : PA9 |
| - UART_1_RX : PA10 |
| - UART_2_TX : PA2 |
| - UART_2_RX : PA3 |
| - I2C_1_SCL : PB6 |
| - I2C_1_SDA : PB7 |
| - PWM_2_CH1 : PA0 |
| - LD3 : PB3 |
| |
| System Clock |
| ------------ |
| |
| Nucleo L432KC System Clock could be driven by internal or external oscillator, |
| as well as main PLL clock. By default System clock is driven by PLL clock at 80MHz, |
| driven by 16MHz high speed internal oscillator. |
| |
| Serial Port |
| ----------- |
| |
| Nucleo L432KC board has 3 U(S)ARTs. The Zephyr console output is assigned to UART2. |
| Default settings are 115200 8N1. |
| |
| |
| Programming and Debugging |
| ************************* |
| |
| Flashing |
| ======== |
| |
| Nucleo L432KC board includes an ST-LINK/V2-1 embedded debug tool interface. |
| This interface is not supported by the openocd version 0.9 included by the Zephyr SDK v0.9. |
| Until we update the Zephyr SDK, use openocd v0.10.0 from the openocd-stm32 project on GitHub |
| to get the minimum set of scripts needed to flash and debug STM32 development boards. |
| |
| .. code-block:: console |
| |
| $ git clone https://github.com/erwango/openocd-stm32.git |
| |
| Then follow instructions in README.md |
| |
| |
| Flashing an application to Nucleo L432KC |
| ---------------------------------------- |
| |
| The sample application :ref:`hello_world` is being used in this tutorial: |
| |
| To build the Zephyr kernel and application, enter: |
| |
| .. code-block:: console |
| |
| $ cd <zephyr_root_path> |
| $ source zephyr-env.sh |
| $ cd $ZEPHYR_BASE/samples/hello_world/ |
| $ make BOARD=nucleo_l432kc |
| |
| Connect the Nucleo L432KC to your host computer using the USB port. |
| Then, enter the following command: |
| |
| .. code-block:: console |
| |
| $ cd <openocd-stm32_path> |
| $ stm32_flsh l4 $ZEPHYR_BASE/samples/hello_world/outdir/nucleo_l432kc/zephyr.bin |
| |
| Run a serial host program to connect with your Nucleo board. |
| |
| .. code-block:: console |
| |
| $ minicom -D /dev/ttyACM0 |
| |
| You should see the following message: |
| |
| .. code-block:: console |
| |
| $ Hello World! arm |
| |
| |
| Debugging |
| ========= |
| |
| Access gdb with the following make command: |
| |
| .. code-block:: console |
| |
| $ cd <openocd-stm32_path> |
| $ stm32_dbg l4 $ZEPHYR_BASE/samples/hello_world/outdir/nucleo_l432kc/zephyr.elf |
| |
| .. _Nucleo L432KC website: |
| http://www.st.com/en/evaluation-tools/nucleo-l432kc.html |
| |
| .. _STM32 Nucleo-32 board User Manual: |
| http://www.st.com/resource/en/user_manual/dm00231744.pdf |
| |
| .. _STM32L432KC on www.st.com: |
| http://www.st.com/en/microcontrollers/stm32l432kc.html |
| |
| .. _STM32L432 reference manual: |
| http://www.st.com/resource/en/reference_manual/dm00151940.pdf |
