blob: 72d6efeb712c5ae15eabc8b894211bd00aea8e01 [file] [log] [blame]
/*
* Copyright (c) 2021 Yonatan Schachter
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <arm/armv6-m.dtsi>
#include <dt-bindings/gpio/gpio.h>
#include <mem.h>
#include "rpi_pico_common.dtsi"
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-m0+";
reg = <0>;
};
cpu1: cpu@1 {
compatible = "arm,cortex-m0+";
reg = <1>;
};
};
soc {
sram0: memory@20000000 {
compatible = "mmio-sram";
reg = <0x20000000 DT_SIZE_K(264)>;
};
flash0: flash@10000000 {
compatible = "soc-nv-flash";
label = "FLASH_RP2";
write-block-size = <1>;
};
peripheral_clk: peripheral-clk {
compatible = "fixed-clock";
clock-frequency = <125000000>;
#clock-cells = <0>;
};
pinctrl: pin-controller@40014000 {
compatible = "raspberrypi,pico-pinctrl";
reg = <0x40014000 DT_SIZE_K(4)>;
status = "okay";
label = "PINCTRL";
};
gpio0: gpio@40014000 {
compatible = "raspberrypi,pico-gpio";
reg = <0x40014000 DT_SIZE_K(4)>;
interrupts = <13 RPI_PICO_DEFAULT_IRQ_PRIORITY>;
gpio-controller;
#gpio-cells = <2>;
label = "GPIO_0";
status = "disabled";
};
uart0: uart@40034000 {
compatible = "raspberrypi,pico-uart";
reg = <0x40034000 DT_SIZE_K(4)>;
clocks = <&peripheral_clk>;
interrupts = <20 RPI_PICO_DEFAULT_IRQ_PRIORITY>;
interrupt-names = "uart0";
label = "UART_0";
status = "disabled";
};
uart1: uart@40038000 {
compatible = "raspberrypi,pico-uart";
reg = <0x40038000 DT_SIZE_K(4)>;
clocks = <&peripheral_clk>;
interrupts = <21 RPI_PICO_DEFAULT_IRQ_PRIORITY>;
interrupt-names = "uart1";
label = "UART_1";
status = "disabled";
};
};
};
&nvic {
arm,num-irq-priority-bits = <3>;
};