dts/arm/nxp/nxp_lpc55S06_ns.dtsi

/*
 * Copyright (c) 2022 metraTec
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/ {
	soc {
		sram: sram@400000 {
			ranges = <0x4000000 0x4000000 0x20000000>;
		};

		peripheral: peripheral@40000000 {
			ranges = <0x0 0x40000000 0x10000000>;
		};
	};
};

#include "nxp_lpc55S0x_common.dtsi"

&sramx {
	compatible = "zephyr,memory-region", "mmio-sram";
	reg = <0x40000000 DT_SIZE_K(16)>;
	zephyr,memory-region = "SRAMX";
};

&iap {
	status = "okay";
};

/*
 * lpc55S06:
 * Combine SRAM0, SRAM1, SRAM2 for total of 80K RAM
 */
&sram0 {
	compatible = "mmio-sram";
	reg = <0x20000000 DT_SIZE_K(80)>;
};