blob: 2f63942ce57511a3fb7dff88545e7ceb5c128221 [file] [log] [blame]
/*
* Copyright (c) 2021 Linaro Limited
*
* SPDX-License-Identifier: Apache-2.0
*/
/*
* Warning: This overlay performs configuration from clean sheet.
* It is assumed that it is applied after clear_clocks.overlay file.
*/
&clk_hse {
hse-bypass;
clock-frequency = <DT_FREQ_M(8)>; /* STLink 8MHz clock */
status = "okay";
};
&rcc {
clocks = <&clk_hse>;
clock-frequency = <DT_FREQ_M(8)>;
d1cpre = <1>;
hpre = <1>;
d1ppre = <1>;
d2ppre1 = <1>;
d2ppre2 = <1>;
d3ppre = <1>;
};