boards/st/nucleo_g431kb/nucleo_g431kb.dts

/*
 * Copyright (c) 2024 Klaus Nagel, <nagelkl01@gmail.com>
 *
 * SPDX-License-Identifier: Apache-2.0
 */

/dts-v1/;
#include <st/g4/stm32g431Xb.dtsi>
#include <st/g4/stm32g431k(6-8-b)tx-pinctrl.dtsi>

/ {
	model = "STMicroelectronics STM32G431KB-NUCLEO board";
	compatible = "st,stm32g431kb-nucleo";

	chosen {
		zephyr,console = &lpuart1;
		zephyr,shell-uart = &lpuart1;
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
	};

	leds: leds {
		compatible = "gpio-leds";
		green_led: led_0 {
			gpios = <&gpiob 8 GPIO_ACTIVE_HIGH>;
			label = "User LD2";
		};

	};

	pwmleds {
		compatible = "pwm-leds";

		green_pwm_led: green_pwm_led {
			pwms = <&pwm4 3 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
		};
	};


	aliases {
		led0 = &green_led;
		pwm-led0 = &green_pwm_led;
		watchdog0 = &iwdg;
	};
};

&clk_hsi {
	status = "okay";
};

&clk_lsi {
	status = "okay";
};

stm32_lp_tick_source: &lptim1 {
	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
			 <&rcc STM32_SRC_LSI LPTIM1_SEL(3)>;
	status = "okay";
};

/* Adjust the pll for a SYSTEM Clock of 170MHz  */
&pll {
	div-m = <4>;
	mul-n = <85>;
	div-p = <7>;
	div-q = <2>;
	div-r = <2>;
	clocks = <&clk_hsi>;
	status = "okay";
};

&rcc {
	clocks = <&pll>;
	clock-frequency = <DT_FREQ_M(170)>;
	ahb-prescaler = <1>;
	apb1-prescaler = <1>;
	apb2-prescaler = <1>;
};

&lpuart1 {
	pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>;
	pinctrl-names = "default";
	current-speed = <115200>;
	status = "okay";
};

&timers4 {
	st,prescaler = <10000>;
	status = "okay";

	pwm4: pwm {
		status = "okay";
		pinctrl-0 = <&tim4_ch3_pb8>;
		pinctrl-names = "default";
	};
};

&i2c2 {
	pinctrl-0 = <&i2c2_scl_pa9 &i2c2_sda_pa8>;
	pinctrl-names = "default";
	status = "okay";
};

&flash0 {

	partitions {
		compatible = "fixed-partitions";
		#address-cells = <1>;
		#size-cells = <1>;

		/* Set 4Kb of storage at the end of the 128Kb of flash */
		storage_partition: partition@1f000 {
			label = "storage";
			reg = <0x0001f000 DT_SIZE_K(4)>;
		};
	};
};