| /* |
| * Copyright (c) 2018 Yurii Hamann |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| /** |
| * @file |
| * @brief System/hardware module for STM32F7 processor |
| */ |
| |
| #include <zephyr/kernel.h> |
| #include <zephyr/device.h> |
| #include <zephyr/init.h> |
| #include <zephyr/cache.h> |
| #include <soc.h> |
| |
| #include <cmsis_core.h> |
| #include <stm32_ll_system.h> |
| |
| /** |
| * @brief Perform basic hardware initialization at boot. |
| * |
| * This needs to be run from the very beginning. |
| */ |
| void soc_early_init_hook(void) |
| { |
| /* Enable ART Flash cache accelerator and prefetch */ |
| LL_FLASH_EnableART(); |
| LL_FLASH_EnablePrefetch(); |
| |
| sys_cache_instr_enable(); |
| sys_cache_data_enable(); |
| |
| /* Update CMSIS SystemCoreClock variable (HCLK) */ |
| /* At reset, system core clock is set to 16 MHz from HSI */ |
| SystemCoreClock = 16000000; |
| } |