| /* |
| * Copyright (c) 2019 Nordic Semiconductor ASA |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #include <arm/armv8-m.dtsi> |
| #include "nrf_common.dtsi" |
| |
| / { |
| chosen { |
| zephyr,entropy = &rng; |
| zephyr,flash-controller = &flash_controller; |
| }; |
| |
| cpus { |
| #address-cells = <1>; |
| #size-cells = <0>; |
| |
| cpu@1 { |
| device_type = "cpu"; |
| compatible = "arm,cortex-m33"; |
| reg = <1>; |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| mpu: mpu@e000ed90 { |
| compatible = "arm,armv8m-mpu"; |
| reg = <0xe000ed90 0x40>; |
| }; |
| }; |
| }; |
| |
| soc { |
| ficr: ficr@1ff0000 { |
| compatible = "nordic,nrf-ficr"; |
| reg = <0x01ff0000 0x1000>; |
| status = "okay"; |
| }; |
| |
| uicr: uicr@1ff8000 { |
| compatible = "nordic,nrf-uicr"; |
| reg = <0x01ff8000 0x1000>; |
| status = "okay"; |
| }; |
| |
| sram0: memory@20000000 { |
| compatible = "mmio-sram"; |
| }; |
| |
| sram1: memory@21000000 { |
| compatible = "zephyr,memory-region", "mmio-sram"; |
| zephyr,memory-region = "SRAM1"; |
| }; |
| |
| clock: clock@41005000 { |
| compatible = "nordic,nrf-clock"; |
| reg = <0x41005000 0x1000>; |
| interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "okay"; |
| }; |
| |
| power: power@41005000 { |
| compatible = "nordic,nrf-power"; |
| reg = <0x41005000 0x1000>; |
| interrupts = <5 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "okay"; |
| }; |
| |
| radio: radio@41008000 { |
| compatible = "nordic,nrf-radio"; |
| reg = <0x41008000 0x1000>; |
| interrupts = <8 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "okay"; |
| dfe-supported; |
| ieee802154-supported; |
| ble-2mbps-supported; |
| ble-coded-phy-supported; |
| |
| ieee802154: ieee802154 { |
| compatible = "nordic,nrf-ieee802154"; |
| label = "IEEE802154_nrf5"; |
| status = "disabled"; |
| }; |
| }; |
| |
| rng: random@41009000 { |
| compatible = "nordic,nrf-rng"; |
| reg = <0x41009000 0x1000>; |
| interrupts = <9 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "okay"; |
| }; |
| |
| gpiote: gpiote@4100a000 { |
| compatible = "nordic,nrf-gpiote"; |
| reg = <0x4100a000 0x1000>; |
| interrupts = <10 5>; |
| status = "disabled"; |
| }; |
| |
| wdt: wdt0: watchdog@4100b000 { |
| compatible = "nordic,nrf-wdt"; |
| reg = <0x4100b000 0x1000>; |
| interrupts = <11 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "okay"; |
| }; |
| |
| timer0: timer@4100c000 { |
| compatible = "nordic,nrf-timer"; |
| status = "disabled"; |
| reg = <0x4100c000 0x1000>; |
| cc-num = <8>; |
| interrupts = <12 NRF_DEFAULT_IRQ_PRIORITY>; |
| prescaler = <0>; |
| }; |
| |
| ecb: ecb@4100d000 { |
| compatible = "nordic,nrf-ecb"; |
| reg = <0x4100d000 0x1000>; |
| interrupts = <13 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "okay"; |
| }; |
| |
| ccm: ccm@4100e000 { |
| compatible = "nordic,nrf-ccm"; |
| reg = <0x4100e000 0x1000>; |
| interrupts = <14 NRF_DEFAULT_IRQ_PRIORITY>; |
| length-field-length-8-bits; |
| status = "okay"; |
| }; |
| |
| dppic: dppic@4100f000 { |
| compatible = "nordic,nrf-dppic"; |
| reg = <0x4100f000 0x1000>; |
| status = "okay"; |
| }; |
| |
| temp: temp@41010000 { |
| compatible = "nordic,nrf-temp"; |
| reg = <0x41010000 0x1000>; |
| interrupts = <16 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "okay"; |
| }; |
| |
| rtc0: rtc@41011000 { |
| compatible = "nordic,nrf-rtc"; |
| reg = <0x41011000 0x1000>; |
| cc-num = <4>; |
| interrupts = <17 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "okay"; |
| }; |
| |
| mbox: ipc: mbox@41012000 { |
| compatible = "nordic,mbox-nrf-ipc", "nordic,nrf-ipc"; |
| reg = <0x41012000 0x1000>; |
| tx-mask = <0x0000ffff>; |
| rx-mask = <0x0000ffff>; |
| interrupts = <18 NRF_DEFAULT_IRQ_PRIORITY>; |
| #mbox-cells = <1>; |
| status = "okay"; |
| }; |
| |
| i2c0: i2c@41013000 { |
| /* |
| * This i2c node can be TWIM or TWIS, |
| * for the user to pick: |
| * compatible = "nordic,nrf-twim" or |
| * "nordic,nrf-twis". |
| */ |
| compatible = "nordic,nrf-twim"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x41013000 0x1000>; |
| clock-frequency = <I2C_BITRATE_STANDARD>; |
| interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "disabled"; |
| }; |
| |
| spi0: spi@41013000 { |
| /* |
| * This spi node can be SPIM or SPIS, |
| * for the user to pick: |
| * compatible = "nordic,nrf-spim" or |
| * "nordic,nrf-spis". |
| */ |
| compatible = "nordic,nrf-spim"; |
| #address-cells = <1>; |
| #size-cells = <0>; |
| reg = <0x41013000 0x1000>; |
| interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>; |
| max-frequency = <DT_FREQ_M(8)>; |
| status = "disabled"; |
| }; |
| |
| uart0: uart@41013000 { |
| compatible = "nordic,nrf-uarte"; |
| reg = <0x41013000 0x1000>; |
| interrupts = <19 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "disabled"; |
| }; |
| |
| egu0: egu@41014000 { |
| compatible = "nordic,nrf-egu"; |
| reg = <0x41014000 0x1000>; |
| interrupts = <20 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "okay"; |
| }; |
| |
| rtc1: rtc@41016000 { |
| compatible = "nordic,nrf-rtc"; |
| reg = <0x41016000 0x1000>; |
| cc-num = <4>; |
| interrupts = <22 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "okay"; |
| }; |
| |
| timer1: timer@41018000 { |
| compatible = "nordic,nrf-timer"; |
| status = "disabled"; |
| reg = <0x41018000 0x1000>; |
| cc-num = <8>; |
| interrupts = <24 NRF_DEFAULT_IRQ_PRIORITY>; |
| prescaler = <0>; |
| }; |
| |
| timer2: timer@41019000 { |
| compatible = "nordic,nrf-timer"; |
| status = "disabled"; |
| reg = <0x41019000 0x1000>; |
| cc-num = <8>; |
| interrupts = <25 NRF_DEFAULT_IRQ_PRIORITY>; |
| prescaler = <0>; |
| }; |
| |
| swi0: swi@4101a000 { |
| compatible = "nordic,nrf-swi"; |
| reg = <0x4101a000 0x1000>; |
| interrupts = <26 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "okay"; |
| }; |
| |
| swi1: swi@4101b000 { |
| compatible = "nordic,nrf-swi"; |
| reg = <0x4101b000 0x1000>; |
| interrupts = <27 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "okay"; |
| }; |
| |
| swi2: swi@4101c000 { |
| compatible = "nordic,nrf-swi"; |
| reg = <0x4101c000 0x1000>; |
| interrupts = <28 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "okay"; |
| }; |
| |
| swi3: swi@4101d000 { |
| compatible = "nordic,nrf-swi"; |
| reg = <0x4101d000 0x1000>; |
| interrupts = <29 NRF_DEFAULT_IRQ_PRIORITY>; |
| status = "okay"; |
| }; |
| |
| acl: acl@41080000 { |
| compatible = "nordic,nrf-acl"; |
| reg = <0x41080000 0x1000>; |
| status = "okay"; |
| }; |
| |
| flash_controller: flash-controller@41080000 { |
| compatible = "nordic,nrf53-flash-controller"; |
| reg = <0x41080000 0x1000>; |
| partial-erase; |
| |
| #address-cells = <1>; |
| #size-cells = <1>; |
| |
| |
| flash1: flash@1000000 { |
| compatible = "soc-nv-flash"; |
| erase-block-size = <2048>; |
| write-block-size = <4>; |
| }; |
| }; |
| |
| vmc: vmc@41081000 { |
| compatible = "nordic,nrf-vmc"; |
| reg = <0x41081000 0x1000>; |
| status = "okay"; |
| }; |
| |
| gpio0: gpio@418c0500 { |
| compatible = "nordic,nrf-gpio"; |
| gpio-controller; |
| reg = <0x418c0500 0x300>; |
| #gpio-cells = <2>; |
| status = "disabled"; |
| port = <0>; |
| }; |
| |
| gpio1: gpio@418c0800 { |
| compatible = "nordic,nrf-gpio"; |
| gpio-controller; |
| reg = <0x418c0800 0x300>; |
| #gpio-cells = <2>; |
| ngpios = <16>; |
| status = "disabled"; |
| port = <1>; |
| }; |
| }; |
| |
| /* Default IPC description */ |
| ipc { |
| ipc0: ipc0 { |
| compatible = "zephyr,ipc-openamp-static-vrings"; |
| memory-region = <&sram0_shared>; |
| mboxes = <&mbox 0>, <&mbox 1>; |
| mbox-names = "rx", "tx"; |
| role = "remote"; |
| status = "okay"; |
| }; |
| }; |
| }; |
| |
| &nvic { |
| arm,num-irq-priority-bits = <3>; |
| }; |
