| /* system.c - system/hardware module for the Quark BSP */ |
| |
| /* |
| * Copyright (c) 2013-2015, Wind River Systems, Inc. |
| * |
| * Redistribution and use in source and binary forms, with or without |
| * modification, are permitted provided that the following conditions are met: |
| * |
| * 1) Redistributions of source code must retain the above copyright notice, |
| * this list of conditions and the following disclaimer. |
| * |
| * 2) Redistributions in binary form must reproduce the above copyright notice, |
| * this list of conditions and the following disclaimer in the documentation |
| * and/or other materials provided with the distribution. |
| * |
| * 3) Neither the name of Wind River Systems nor the names of its contributors |
| * may be used to endorse or promote products derived from this software without |
| * specific prior written permission. |
| * |
| * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" |
| * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE |
| * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE |
| * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE |
| * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
| * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
| * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
| * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
| * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
| * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
| * POSSIBILITY OF SUCH DAMAGE. |
| */ |
| |
| /* |
| DESCRIPTION |
| This module provides routines to initialize and support board-level hardware |
| for the Quark BSP. |
| |
| Implementation Remarks: |
| Handlers for the secondary serial port have not been added. |
| */ |
| |
| #include <cputype.h> |
| #include <nanokernel.h> |
| #include <nanokernel/cpu.h> |
| #include <misc/printk.h> |
| #include <misc/__assert.h> |
| #include "board.h" |
| #include <drivers/uart.h> |
| #include <drivers/ioapic.h> |
| #include <drivers/loapic.h> |
| #include <pci/pci.h> |
| |
| #define PCI_CLASS_COMM_CTLR 0x07 |
| |
| #if defined(CONFIG_PRINTK) || defined(CONFIG_STDOUT_CONSOLE) |
| #define DO_CONSOLE_INIT |
| #endif |
| |
| |
| |
| /******************************************************************************* |
| * |
| * _SysPciMap - maps PCI memory region |
| * |
| * This routine is defined in the BSP as the memory layout of the board is |
| * board specific. However, the prototype is located in pci.h. |
| * |
| * RETURNS: virtual address |
| * |
| */ |
| |
| uint32_t _SysPciMap(uint32_t addr, uint32_t size) |
| { |
| ARG_UNUSED(size); |
| return addr; |
| } |
| |
| #if defined(DO_CONSOLE_INIT) |
| |
| /******************************************************************************* |
| * |
| * uartGenericInfoInit - initialize initialization information for one UART |
| * |
| * RETURNS: N/A |
| * |
| */ |
| |
| static void uartGenericInfoInit(struct uart_init_info *p_info) |
| { |
| p_info->options = 0; |
| p_info->sys_clk_freq = UART_XTAL_FREQ; |
| p_info->baud_rate = CONFIG_UART_BAUDRATE; |
| } |
| |
| #endif /* DO_CONSOLE_INIT */ |
| |
| #if defined(DO_CONSOLE_INIT) |
| |
| /******************************************************************************* |
| * |
| * consoleInit - initialize target-only console |
| * |
| * Only used for debugging. |
| * |
| * RETURNS: N/A |
| * |
| */ |
| |
| #include <console/uart_console.h> |
| |
| static void consoleInit(void) |
| { |
| struct uart_init_info info; |
| uint32_t addr; |
| uint32_t size; |
| int irq; |
| |
| uartGenericInfoInit(&info); |
| |
| /* |
| * Even though, pci_dev_find() returns an error if the device isn't found, |
| * we |
| * ignore it as an error means that the class and/or index supplied is |
| * incorrect. The serial device *SHOULD* be found. |
| */ |
| __ASSERT_EVAL((void)pci_dev_find(PCI_CLASS_COMM_CTLR, |
| CONFIG_UART_CONSOLE_PCI_IDX, |
| &addr, |
| &size, |
| &irq), |
| int res = pci_dev_find(PCI_CLASS_COMM_CTLR, |
| CONFIG_UART_CONSOLE_PCI_IDX, |
| &addr, |
| &size, |
| &irq), |
| res != -1, |
| ""); |
| |
| info.regs = _SysPciMap(addr, size); |
| |
| uart_init(CONFIG_UART_CONSOLE_INDEX, &info); |
| uart_console_init(); |
| } |
| |
| #else |
| #define consoleInit() \ |
| do {/* nothing */ \ |
| } while ((0)) |
| #endif /* DO_CONSOLE_INIT */ |
| |
| /******************************************************************************* |
| * |
| * _InitHardware - perform basic hardware initialization |
| * |
| * Initialize the Intel LOAPIC and IOAPIC device driver and the |
| * Intel 8250 UART device driver. |
| * Also initialize the timer device driver, if required. |
| * |
| * RETURNS: N/A |
| */ |
| |
| void _InitHardware(void) |
| { |
| _loapic_init(); |
| _ioapic_init(); |
| |
| _ioapic_irq_set(HPET_TIMER0_IRQ, HPET_TIMER0_VEC, HPET_IOAPIC_FLAGS); |
| |
| pci_bus_scan(1 << PCI_CLASS_COMM_CTLR); |
| |
| consoleInit(); /* NOP if not needed */ |
| |
| #ifdef PCI_DEBUG |
| pci_show(); |
| #endif /* PCI_DEBUG */ |
| } |