blob: 85628cd1cc3dfff3dcab522b7b42796ca00b2e62 [file] [log] [blame]
/*
* Copyright (c) 2020 Linumiz
* Author: Parthiban Nallathambi <parthiban@linumiz.com>
*
* SPDX-License-Identifier: Apache-2.0
*/
#include <arm/armv7-m.dtsi>
#include <zephyr/dt-bindings/gpio/gpio.h>
#include <zephyr/dt-bindings/gpio/infineon-xmc4xxx-gpio.h>
/ {
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
compatible = "arm,cortex-m4f";
reg = <0>;
};
};
/* TODO: Add psram1 & dsram2 to MEMORY layout of linker */
psram1: memory@10000000 {
compatible = "mmio-sram";
};
dsram1: memory@20000000 {
compatible = "mmio-sram";
};
dsram2: memory@30000000 {
compatible = "mmio-sram";
};
flash_controller: flash_controller@58001000 {
compatible = "infineon,xmc4xxx-flash-controller";
reg = <0x58001000 0x1400>;
#address-cells = <1>;
#size-cells = <1>;
flash0: flash@c000000 {
compatible = "infineon,xmc4xxx-nv-flash","soc-nv-flash";
write-block-size = <256>;
};
};
sysclk: system-clock {
compatible = "fixed-clock";
clock-frequency = <120000000>;
#clock-cells = <0>;
};
soc {
pinctrl: pinctrl@48028000 {
compatible = "infineon,xmc4xxx-pinctrl";
#address-cells = <1>;
#size-cells = <1>;
gpio0: gpio@48028000 {
compatible = "infineon,xmc4xxx-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48028000 0x100>;
status = "disabled";
};
gpio1: gpio@48028100 {
compatible = "infineon,xmc4xxx-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48028100 0x100>;
status = "disabled";
};
gpio2: gpio@48028200 {
compatible = "infineon,xmc4xxx-gpio";
gpio-controller;
#gpio-cells = <2>;
reg = <0x48028200 0x100>;
status = "disabled";
};
};
usic0ch0: usic@40030000 {
reg = <0x40030000 0x1ff>;
clocks = <&sysclk>;
status = "disabled";
};
usic0ch1: usic@40030200 {
reg = <0x40030200 0x1ff>;
clocks = <&sysclk>;
status = "disabled";
};
usic1ch0: usic@48020000 {
reg = <0x48020000 0x1ff>;
clocks = <&sysclk>;
status = "disabled";
};
usic1ch1: usic@48020200 {
reg = <0x48020200 0x1ff>;
clocks = <&sysclk>;
status = "disabled";
};
usic2ch0: usic@48024000 {
reg = <0x48024000 0x1ff>;
clocks = <&sysclk>;
status = "disabled";
};
usic2ch1: usic@48024200 {
reg = <0x48024200 0x1ff>;
clocks = <&sysclk>;
status = "disabled";
};
};
};
&nvic {
arm,num-irq-priority-bits = <6>;
};