blob: 0922595863ce65b9103ccf450af5de7a5105d118 [file] [log] [blame]
# Kconfig.mmio - MMIO-based GPIO configuration options
#
#
# Copyright (c) 2016 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
menuconfig GPIO_MMIO
bool "MMIO-based GPIO driver"
depends on GPIO
default n
help
Enable driver for MMIO-based GPIOs.
if GPIO_MMIO
config GPIO_MMIO_INIT_PRIORITY
int
depends on GPIO_MMIO
default 60
prompt "Init priority"
help
Device driver initialization priority.
config GPIO_MMIO_0
bool "MMIO-based GPIO Port #0"
depends on GPIO_MMIO
default n
help
Enable config options for MMIO-based GPIO port #0.
config GPIO_MMIO_0_DEV_NAME
string "MMIO-based GPIO Port #0 Device Name"
depends on GPIO_MMIO_0
default "GPIO_0"
help
Specify the device name.
choice
prompt "MMIO-based GPIO Port #0 Access Method"
default GPIO_MMIO_0_ACCESS_MM
depends on GPIO_MMIO_0
config GPIO_MMIO_0_ACCESS_MM
bool "Direct Memory Access"
config GPIO_MMIO_0_ACCESS_IO
bool "I/O Port"
endchoice
config GPIO_MMIO_0_CFG
hex "MMIO-based GPIO Port #0 Configuration"
depends on GPIO_MMIO_0
default 0x0
help
Configuration for this GPIO port.
Refer to <drivers/gpio/gpio-mmio.h> for more information.
config GPIO_MMIO_0_EN
hex "MMIO-based GPIO Port #0 Enable Register Address"
depends on GPIO_MMIO_0
default 0x0
help
The memory address for enable register.
config GPIO_MMIO_0_DIR
hex "MMIO-based GPIO Port #0 Direction Register Address"
depends on GPIO_MMIO_0
default 0x0
help
The memory address for direction register.
config GPIO_MMIO_0_INPUT
hex "MMIO-based GPIO Port #0 Input Pin Level Register Address"
depends on GPIO_MMIO_0
default 0x0
help
The memory address for input pin level register.
config GPIO_MMIO_0_OUTPUT
hex "MMIO-based GPIO Port #0 Output Pin Level Register Address"
depends on GPIO_MMIO_0
default 0x0
help
The memory address for output pin level register.
config GPIO_MMIO_1
bool "MMIO-based GPIO Port #1"
depends on GPIO_MMIO
default n
help
Enable config options for MMIO-based GPIO port #1.
config GPIO_MMIO_1_DEV_NAME
string "MMIO-based GPIO Port #1 Device Name"
depends on GPIO_MMIO_1
default "GPIO_1"
help
Specify the device name.
choice
prompt "MMIO-based GPIO Port #1 Access Method"
default GPIO_MMIO_1_ACCESS_MM
depends on GPIO_MMIO_1
config GPIO_MMIO_1_ACCESS_MM
bool "Direct Memory Access"
config GPIO_MMIO_1_ACCESS_IO
bool "I/O Port"
endchoice
config GPIO_MMIO_1_CFG
hex "MMIO-based GPIO Port #1 Configuration"
depends on GPIO_MMIO_1
default 0x0
help
Configuration for this GPIO port.
Refer to <drivers/gpio/gpio-mmio.h> for more information.
config GPIO_MMIO_1_EN
hex "MMIO-based GPIO Port #1 Enable Register Address"
depends on GPIO_MMIO_1
default 0x0
help
The memory address for enable register.
config GPIO_MMIO_1_DIR
hex "MMIO-based GPIO Port #1 Direction Register Address"
depends on GPIO_MMIO_1
default 0x0
help
The memory address for direction register.
config GPIO_MMIO_1_INPUT
hex "MMIO-based GPIO Port #1 Input Pin Level Register Address"
depends on GPIO_MMIO_1
default 0x0
help
The memory address for input pin level register.
config GPIO_MMIO_1_OUTPUT
hex "MMIO-based GPIO Port #1 Output Pin Level Register Address"
depends on GPIO_MMIO_1
default 0x0
help
The memory address for output pin level register.
endif # GPIO_MMIO