boards/amd/kv260_r5/kv260_r5.dts

/*
 * Copyright (c) 2022 Linaro.
 *
 * SPDX-License-Identifier: Apache-2.0
 *
 */

/dts-v1/;
#include <arm/xilinx/zynqmp_rpu.dtsi>

/ {
	model = "KV260 Cortex-R5";
	compatible = "xlnx,zynqmp-r5";

	sram0: memory@0 {
		compatible = "mmio-sram";
		reg = <0 DT_SIZE_M(64)>;
	};

	chosen {
		zephyr,sram = &sram0;
		zephyr,flash = &flash0;
		zephyr,console = &uart1;
		zephyr,shell-uart = &uart1;
		zephyr,ocm = &ocm;
	};

	aliases {
		eeprom-0 = &eeprom0;
		eeprom-1 = &eeprom1;
	};

	i2c_ref_clk: i2c-ref-clk {
		compatible = "fixed-clock";
		clock-frequency = <100000000>;
		#clock-cells = <0>;
	};
};

&uart1 {
	status = "okay";
	current-speed = <115200>;
	clock-frequency = <99999901>;
};

&ttc0 {
	status = "okay";
	clock-frequency = <100000000>;
};

&psgpio {
	status = "okay";
};

&i2c1 {
	status = "okay";
	clocks = <&i2c_ref_clk>;
	clock-frequency = <400000>;

	eeprom0: eeprom@50 {
		compatible = "st,24c64", "atmel,at24";
		reg = <0x50>;
		size = <DT_SIZE_K(8)>;
		pagesize = <32>;
		address-width = <16>;
		timeout = <5>;
		read-only;
	};

	eeprom1: eeprom@51 {
		compatible = "st,24c64", "atmel,at24";
		reg = <0x51>;
		size = <DT_SIZE_K(8)>;
		pagesize = <32>;
		address-width = <16>;
		timeout = <5>;
		read-only;
	};
};