commit b6d2f22bd4de73e292574431acee058aac46c60c
author Jose Alberto Meza <jose.a.meza.arellano@intel.com> Thu May 12 12:33:26 2022 -0700
committer Carles Cufí <carles.cufi@nordicsemi.no> Mon Jul 04 16:18:42 2022 +0200
tree b680571f0688d7a93c533b6095fa2642f42b3150
parent eebd67ca7b966394c56a36c700bae78d25b1e65e

dts: bindings: spi: Use consistent dts names for mec172x

Use consistent name for SPI HW block property so applications
using a device tree overlay work transparently.

Signed-off-by: Jose Alberto Meza <jose.a.meza.arellano@intel.com>

dts/bindings/spi/microchip,xec-qmspi-ldma.yaml

diff --git a/dts/bindings/spi/microchip,xec-qmspi-ldma.yaml b/dts/bindings/spi/microchip,xec-qmspi-ldma.yaml
index 6410086..c58b7ad 100644
--- a/dts/bindings/spi/microchip,xec-qmspi-ldma.yaml
+++ b/dts/bindings/spi/microchip,xec-qmspi-ldma.yaml
@@ -42,7 +42,7 @@
         MOSI and MISO or half-duplex on MOSI only. Lines set to 2
         or 4 indicate dual or quad I/O modes. Defaults to 1.
 
-    port-sel:
+    port_sel:
       type: int
       required: false
       description: |
@@ -51,7 +51,7 @@
         chip configurations with an embedded SPI flash. Defaults
         to port 0 (shared SPI port).
 
-    chip-select:
+    chip_select:
       type: int
       required: false
       description: |