blob: baf1716f08268f4aad86daeb662edfdf2c905a04 [file] [log] [blame]
/*
* Copyright 2020 Broadcom
*
* SPDX-License-Identifier: Apache-2.0
*/
/ {
soc {
sram0: memory@400000 {
device_type = "memory";
reg = <0x00400000 0x80000>;
};
uart0: uart@40020000 {
compatible = "ns16550";
reg = <0x40020000 0x400>;
clock-frequency = <25000000>;
reg-shift = <2>;
status = "disabled";
};
uart1: uart@48100000 {
compatible = "ns16550";
reg = <0x48100000 0x400>;
clock-frequency = <100000000>;
reg-shift = <2>;
status = "disabled";
};
pl330: pl330@48300000 {
compatible = "arm,dma-pl330";
reg = <0x48300000 0x2000>,
<0x482f005c 0x20>;
reg-names = "pl330_regs",
"control_regs";
microcode = <0x63b00000 0x1000>;
dma-channels = <8>;
#dma-cells = <1>;
};
};
pcie {
#address-cells = <2>;
#size-cells = <2>;
pcie0_ep: pcie@4e100000 {
compatible = "brcm,iproc-pcie-ep";
reg = <0x0 0x4e100000 0x0 0x2100>,
<0x0 0x50000000 0x0 0x8000000>,
<0x4 0x0 0x0 0x8000000>;
reg-names = "iproc_pcie_regs", "map_lowmem",
"map_highmem";
dmas = <&pl330 0>, <&pl330 1>;
dma-names = "txdma", "rxdma";
};
paxdma: paxdma@4e100800 {
compatible = "brcm,iproc-pax-dma-v2";
reg = <0x0 0x4e100800 0x0 0x2100>,
<0x0 0x4f000000 0x0 0x200000>,
<0x0 0x4f200000 0x0 0x10000>;
reg-names = "dme_regs", "rm_ring_regs",
"rm_comm_regs";
dma-channels = <4>;
#dma-cells = <1>;
bd-memory = <0x63b00000 0x100000>;
scr-addr-loc = <0x200061f0>;
scr-size-loc = <0x200061f8>;
pcie-ep = <&pcie0_ep>;
};
};
};