| /* |
| * Copyright (c) 2022 Telink Semiconductor |
| * |
| * SPDX-License-Identifier: Apache-2.0 |
| */ |
| |
| #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_ADC_B91_ADC_H_ |
| #define ZEPHYR_INCLUDE_DT_BINDINGS_ADC_B91_ADC_H_ |
| |
| #define DT_ADC_GPIO_PB0 0x01 |
| #define DT_ADC_GPIO_PB1 0x02 |
| #define DT_ADC_GPIO_PB2 0x03 |
| #define DT_ADC_GPIO_PB3 0x04 |
| #define DT_ADC_GPIO_PB4 0x05 |
| #define DT_ADC_GPIO_PB5 0x06 |
| #define DT_ADC_GPIO_PB6 0x07 |
| #define DT_ADC_GPIO_PB7 0x08 |
| #define DT_ADC_GPIO_PD0 0x09 |
| #define DT_ADC_GPIO_PD1 0x0a |
| #define DT_ADC_VBAT 0x0f |
| |
| #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_ADC_B91_ADC_H_ */ |
